# MCP6231-E

**Microchip Tech** · Operational Amplifier · SOIC-8

MCP6231-E from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No internal connection; leave unconnected. |
| 2 | VIN- | power_in | Inverting input is a high-impedance CMOS input with low bias current. |
| 3 | VIN+ | power_in | Noninverting input is a high-impedance CMOS input with low bias current; the common-mode input range extends from VDD + 300 mV to VSS - 300 mV. |
| 4 | VSS | power_in | Negative power supply; in single-supply operation it is connected to ground, and VDD must be 1.8V to 6.0V higher than VSS. |
| 5 | NC | unconnected | No internal connection; leave unconnected. |
| 6 | VOUT | output | Analog output is a low-impedance voltage source. |
| 7 | VDD | power_in | Positive power supply, 1.8V to 6.0V higher than VSS, requires bypass capacitors. |
| 8 | NC | unconnected | No internal connection; leave unconnected. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Operational Amplifier/Comparator |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Offset Voltage | VOS | -5 |  | 5 | mV | VCM = VSS | 3 |
| Input Offset Voltage, Extended Temperature | VOS | -7 |  | 7 | mV | TA = -40°C to +125°C, VCM = VSS (Note 1) | 3 |
| Common-Mode Rejection Ratio | CMRR | 61 | 75 |  | dB | VCM = -0.3V to 5.3V, VDD = 5V | 3 |
| DC Open-Loop Gain (large signal) | AOL | 90 | 110 |  | dB | VOUT = 0.3V to VDD, 0.3V, VCM =VSS | 3 |
| Supply Voltage | VDD | 1.8 |  | 6 | V |  | 3 |
| Quiescent Current per Amplifier | IQ | 10 | 20 | 30 | µA | IO = 0, VCM = VDD, 0.5V | 3 |
| Extended Temperature Range | TA | -40 |  | 125 | °C |  | 4 |
| Operating Temperature Range | TA | -40 |  | 125 | °C | Note 1: TJ must not exceed +150°C | 4 |
| Storage Temperature Range | TA | -65 |  | 150 | °C |  | 4 |
| Supply Voltage (VDD, VSS) absolute maximum | VDD-VSS |  |  | 7 | V |  | 3 |
| Current at Analog Input Pins (VIN+, VIN-) |  | -2 |  | 2 | mA |  | 3 |
| Current at Output and Supply Pins |  | -30 |  | 30 | mA |  | 3 |
| Storage Temperature |  | -65 |  | 150 | °C |  | 3 |
| Maximum Junction Temperature | TJ |  |  | 150 | °C |  | 3 |
| ESD Protection on All Pins |  |  |  | 4 | kV | HBM | 3 |
| ESD Protection on All Pins |  |  |  | 300 | V | MM | 3 |
| Thermal Resistance, 8L-SOIC | JA |  | 163 |  | °C/W |  | 4 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts |  | tin | 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC] A A2 | 37 |

## CAD (KiCad official)

- Symbol: `MCP6231-E`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `mcp6231-e-etched.step` / `mcp6231-e-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mcp6231-e.step` / `mcp6231-e.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Microchip Tech datasheet](docs/mcp6231-e-datasheet.pdf) (52 pp, sha256 `dd66ca9f54b81dc2`, retrieved 2026-10-31, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/mcp6231-e-datasheet.pdf)