component
MCP617-I
Public Made by Adomby adom
Microchip Tech Pre-ordered Chips, MSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownMCP617-I
Microchip Tech · Pre-ordered Chips · MSOP-8
MCP617-I from Microchip Tech, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUTA | output | Output of op amp A, a low-impedance voltage source. |
| 2 | VINA- | input | Inverting input of op amp A, a high-impedance PNP input with low bias current. |
| 3 | VINA+ | input | Non-inverting input of op amp A, a high-impedance PNP input with low bias current. |
| 4 | VSS | power_in | Negative power supply, connected to ground in single-supply use; VDD must be 2.3V to 5.5V above it. |
| 5 | VINB+ | input | Non-inverting input of op amp B, a high-impedance PNP input with low bias current. |
| 6 | VINB- | input | Inverting input of op amp B, a high-impedance PNP input with low bias current. |
| 7 | VOUTB | output | Output of op amp B, a low-impedance voltage source. |
| 8 | VDD | power_in | Positive power supply, 2.3V to 5.5V above VSS, requiring bypass capacitors. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | MSOP-8 |
| Category | Interface ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Offset Voltage | VOS | -150 | 150 | µV | TA = +25°C, VCM = VDD/2 | 3 | |
| Power Supply Rejection | PSRR | 86 | 105 | dB | 3 | ||
| Input Bias Current | IB | -35 | -15 | -5 | nA | 3 | |
| Input Bias Current at Temperature | IB | -70 | -21 | nA | TA = -40°C | 3 | |
| Common-mode Input Voltage Range | VCMR | 0 | V | VSS to VDD, 0.9 V (min = VSS) | 3 | ||
| Common-mode Rejection Ratio | CMRR | 80 | 100 | dB | VDD = 5.0V, VCM = 0.0V to 4.1V | 3 | |
| DC Open-Loop Gain (large signal) | AOL | 100 | 120 | dB | RL = 25 kΩ to VDD/2, VOUT = 0.05V to VDD, 0.05V | 3 | |
| DC Open-Loop Gain (large signal) | AOL | 95 | 115 | dB | RL = 5 kΩ to VDD/2, VOUT = 0.1V to VDD, 0.1V | 3 | |
| Maximum Output Voltage Swing (low, VOL-VSS) | VOL | 15 | mV | RL = 25 kΩ to VDD/2, 0.5V input overdrive (VSS + 15) | 3 | ||
| Maximum Output Voltage Swing (high, VDD-VOH) | VOH | 20 | mV | RL = 25 kΩ to VDD/2, 0.5V input overdrive (VDD - 20) | 3 | ||
| Maximum Output Voltage Swing (low, VOL-VSS) | VOL | 45 | mV | RL = 5 kΩ to VDD/2, 0.5V input overdrive (VSS + 45) | 3 | ||
| Maximum Output Voltage Swing (high, VDD-VOH) | VOH | 60 | mV | RL = 5 kΩ to VDD/2, 0.5V input overdrive (VDD - 60) | 3 | ||
| Linear Output Voltage Range (from VSS) | VOUT | 50 | mV | RL = 25 kΩ to VDD/2, AOL ≥ 100 dB (VSS + 50) | 3 | ||
| Linear Output Voltage Range (from VDD) | VOUT | 50 | mV | RL = 25 kΩ to VDD/2, AOL ≥ 100 dB (VDD - 50) | 3 | ||
| Linear Output Voltage Range (from VSS) | VOUT | 100 | mV | RL = 5 kΩ to VDD/2, AOL ≥ 95 dB (VSS + 100) | 3 | ||
| Linear Output Voltage Range (from VDD) | VOUT | 100 | mV | RL = 5 kΩ to VDD/2, AOL ≥ 95 dB (VDD - 100) | 3 | ||
| Supply Voltage | VDD | 2.3 | 5.5 | V | 3 | ||
| Quiescent Current per Amplifier | IQ | 12 | 19 | 25 | µA | IO = 0 | 3 |
| Input Offset Drift with Temperature | ΔVOS/ΔTA | 2.5 | µV/°C | TA = -40°C to +85°C (±2.5 typ) | 3 | ||
| Input Bias Current at Temperature | IB | -12 | nA | TA = +85°C | 3 | ||
| Input Offset Current | IOS | 0.15 | nA | ±0.15 typ | 3 | ||
| Output Short Circuit Current | ISC | 7 | mA | VDD = 2.3V (±7 typ) | 3 | ||
| Output Short Circuit Current | ISC | 17 | mA | VDD = 5.5V (±17 typ) | 3 | ||
| Gain Bandwidth Product | GBWP | 190 | kHz | 4 | |||
| Phase Margin | PM | 57 | ° | G = +1V/V | 4 | ||
| Slew Rate | SR | 0.08 | V/µs | 4 | |||
| Input Noise Voltage | Eni | 2.2 | µVP-P | f = 0.1 Hz to 10 Hz | 4 | ||
| Input Noise Voltage Density | eni | 32 | nV/√Hz | f = 1 kHz | 4 | ||
| Input Noise Current Density | ini | 70 | fA/√Hz | f = 1 kHz | 4 | ||
| Supply Voltage (VDD, VSS) | VDD-VSS | 7 | V | 3 | |||
| Current at Analog Input Pins | -2 | 2 | mA | VIN+ and VIN- | 3 | ||
| Analog Input Voltage | -0.3 | 0.3 | V | VSS, 0.3V to VDD + 0.3V (relative to rails) | 3 | ||
| Current at Output and Supply Pins | -30 | 30 | mA | 3 | |||
| Storage Temperature | -65 | 150 | °C | 3 | |||
| Maximum Junction Temperature | TJ | 150 | °C | 3 | |||
| ESD Protection HBM | 4 | kV | All pins, HBM | 3 | |||
| ESD Protection MM | 400 | V | All pins, MM | 3 | |||
| Specified Temperature Range | TA | -40 | 85 | °C | 5 | ||
| Operating Temperature Range | TA | -40 | 125 | °C | Note 1: reduced performance | 5 | |
| Thermal Resistance, 8L-MSOP | θJA | 211 | °C/W | 5 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC] A A2 | 30 |
CAD (KiCad official)
- Symbol:
MCP617-I - Footprint:
Package_SO:MSOP-8_3x3mm_P0.65mm - 3D model: MSOP-8 (KiCad packages3D, STEP)
- 3D model files:
mcp617-i-etched.step/mcp617-i-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp617-i.step/mcp617-i.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (46 pp, sha256
48f8a3b977aa2ce5, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).