component
MCP6142T-I
Public Made by Adomby adom
Microchip Tech Operational Amplifier, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownMCP6142T-I
Microchip Tech · Operational Amplifier · SOIC-8
MCP6142T-I from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUTA | output | Analog output of op amp A, a low-impedance voltage source. |
| 2 | VINA- | input | Inverting input of op amp A, a high-impedance CMOS input with low bias current. |
| 3 | VINA+ | input | Non-inverting input of op amp A, a high-impedance CMOS input with low bias current. |
| 4 | VSS | power_in | Negative power supply, connected to ground in a single-supply configuration. |
| 5 | VINB+ | input | Non-inverting input of op amp B, a high-impedance CMOS input with low bias current. |
| 6 | VINB- | input | Inverting input of op amp B, a high-impedance CMOS input with low bias current. |
| 7 | VOUTB | output | Analog output of op amp B, a low-impedance voltage source. |
| 8 | VDD | power_in | Positive power supply, 1.4V to 6.0V higher than VSS, and it needs bypass capacitors. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Operational Amplifier/Comparator |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Offset Voltage | VOS | -3 | 3 | mV | VCM = VSS | 3 | |
| Power Supply Rejection | PSRR | 70 | 85 | dB | VCM = VSS | 3 | |
| Input Bias Current, Industrial Temperature | IB | 20 | 100 | pA | TA = +85° | 3 | |
| Common-mode Rejection Ratio | CMRR | 62 | 80 | dB | VDD = 5V, VCM = -0.3V to 5.3V | 3 | |
| Common-mode Rejection Ratio | CMRR | 60 | 75 | dB | VDD = 5V, VCM = 2.5V to 5.3V | 3 | |
| Common-mode Rejection Ratio | CMRR | 60 | 80 | dB | VDD = 5V, VCM = -0.3V to 2.5V | 3 | |
| DC Open-Loop Gain (large signal) | AOL | 95 | 115 | dB | RL = 50 kΩ to VL, VOUT = 0.1V to VDD-0.1V | 3 | |
| Supply Voltage | VDD | 1.4 | 6 | V | Note 1 | 3 | |
| Quiescent Current per Amplifier | IQ | 0.3 | 0.6 | 1 | µA | IO = 0 | 3 |
| Specified Temperature Range, Industrial | TA | -40 | 85 | °C | Industrial Temperature parts | 5 | |
| Operating Temperature Range | TA | -40 | 125 | °C | Note 1 | 5 | |
| Storage Temperature Range | TA | -65 | 150 | °C | 5 | ||
| Current at Analog Input Pins | -2 | 2 | mA | 3 | |||
| Current at Output and Supply Pins | -30 | 30 | mA | 3 | |||
| Storage Temperature | -65 | 150 | °C | 3 | |||
| Maximum Junction Temperature | TJ | 150 | °C | 3 | |||
| ESD Protection (HBM) | 4 | kV | All pins | 3 | |||
| ESD Protection (MM) | 400 | V | All pins | 3 | |||
| Thermal Resistance, 8L-SOIC | θJA | 163 | °C/W | 5 | |||
| Input Offset Voltage Drift | ΔVOS/ΔTA | 1.8 | µV/°C | VCM = VSS, TA = -40°C to +85°C (printed ±1.8) | 3 | ||
| Input Bias Current | IB | 1 | pA | 3 | |||
| Input Offset Current | IOS | 1 | pA | 3 | |||
| Output Short Circuit Current | ISC | 2 | mA | VDD = 1.4V | 3 | ||
| Output Short Circuit Current | ISC | 20 | mA | VDD = 5.5V | 3 | ||
| Gain Bandwidth Product | GBWP | 100 | kHz | 4 | |||
| Slew Rate | SR | 24 | V/ms | 4 | |||
| Phase Margin | PM | 60 | ° | G = +10 V/V | 4 | ||
| Input Voltage Noise | Eni | 5 | µVP-P | f = 0.1 Hz to 10 Hz | 4 | ||
| Input Voltage Noise Density | eni | 170 | nV/√Hz | f = 1 kHz | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC] A A2 | 38 |
CAD (KiCad official)
- Symbol:
MCP6142T-I - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
mcp6142t-i-etched.step/mcp6142t-i-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp6142t-i.step/mcp6142t-i.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (52 pp, sha256
ff8ac139a7fd75dd, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).