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MCP6074-E

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by adom

Microchip Tech Pre-ordered MCUs, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MCP6074-E

Microchip Tech · Pre-ordered MCUs · TSSOP-14

MCP6074-E from Microchip Tech, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUTA output Analog output of op amp A, a low-impedance voltage source.
2 VINA- input Inverting input of op amp A, a high-impedance CMOS input with low bias current.
3 VINA+ input Non-inverting input of op amp A, a high-impedance CMOS input with low bias current.
4 VDD power_in Positive power supply, 1.8V to 6.0V higher than VSS; needs bypass capacitors.
5 VINB+ input Non-inverting input of op amp B, a high-impedance CMOS input with low bias current.
6 VINB- input Inverting input of op amp B, a high-impedance CMOS input with low bias current.
7 VOUTB output Analog output of op amp B, a low-impedance voltage source.
8 VOUTC output Analog output of op amp C, a low-impedance voltage source.
9 VINC- input Inverting input of op amp C, a high-impedance CMOS input with low bias current.
10 VINC+ input Non-inverting input of op amp C, a high-impedance CMOS input with low bias current.
11 VSS power_in Negative power supply; connected to ground in single-supply operation.
12 VIND+ input Non-inverting input of op amp D, a high-impedance CMOS input with low bias current.
13 VIND- input Inverting input of op amp D, a high-impedance CMOS input with low bias current.
14 VOUTD output Analog output of op amp D, a low-impedance voltage source.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TSSOP-14
Category Single Chip Microcomputer/Microcontroller
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Offset Voltage VOS -150 150 µV VDD = 3.0V, VCM = VDD/3 3
Power Supply Rejection Ratio PSRR 70 87 dB VCM = VSS 3
Input Bias Current IB 1 100 pA 3
Input Bias Current IB 1100 5000 pA TA = +125°C 3
Common Mode Input Voltage Range (low) VCMR -0.15 V VDD = 1.8V (Note 1); min VSS-0.15 3
Common Mode Input Voltage Range (high) VCMR 0.15 V VDD = 1.8V (Note 1); max VDD+0.15 3
Common Mode Input Voltage Range (low) VCMR -0.3 V VDD = 6.0V (Note 1); min VSS-0.3 3
Common Mode Input Voltage Range (high) VCMR 0.3 V VDD = 6.0V (Note 1); max VDD+0.3 3
Common Mode Rejection Ratio CMRR 72 89 dB VCM = -0.15V to 1.95V, VDD = 1.8V 3
Common Mode Rejection Ratio CMRR 74 91 dB VCM = -0.3V to 6.3V, VDD = 6.0V 3
Common Mode Rejection Ratio CMRR 72 87 dB VCM = 3.0V to 6.3V, VDD = 6.0V 3
Common Mode Rejection Ratio CMRR 74 89 dB VCM = -0.3V to 3.0V, VDD = 6.0V 3
DC Open-Loop Gain (Large Signal) AOL 95 115 dB 0.2V < VOUT <(VDD-0.2V), VCM = VSS 4
Maximum Output Voltage Swing VOL, VOH 15 15 mV 0.5V input overdrive; VSS+15 mV min, VDD-15 mV max 4
Supply Voltage VDD 1.8 6 V 4
Quiescent Current per Amplifier IQ 50 110 170 µA IO = 0, VDD = 6.0V, VCM = 0.9VDD 4
Operating Temperature Range TA -40 125 °C Note 1 4
Storage Temperature Range TA -65 150 °C 4
Supply Voltage VDD - VSS VDD, VSS 7 V 3
Current at Input Pins -2 2 mA 3
Current at Output and Supply Pins -30 30 mA 3
Storage Temperature -65 150 °C 3
Maximum Junction Temperature TJ 150 °C 3
Thermal Resistance, 14L-TSSOP θJA 100 °C/W 4
Input Offset Drift with Temperature ΔVOS/ΔTA 1.5 µV/°C TA= -40°C to +85°C, VDD = 3.0V, VCM = VDD/3 3
Input Offset Drift with Temperature ΔVOS/ΔTA 4 µV/°C TA= +85°C to +125°C, VDD = 3.0V, VCM = VDD/3 3
Input Bias Current IB 60 pA TA = +85°C 3
Output Short-Circuit Current ISC 7 mA VDD = 1.8V 4
Output Short-Circuit Current ISC 28 mA VDD = 6.0V 4
Gain Bandwidth Product GBWP 1.2 MHz 4
Phase Margin PM 57 ° G = +1 V/V 4
Slew Rate SR 0.5 V/µs 4

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin SL = Plastic SOIC (150 mil Body), 14-lead SN = Plastic SOIC, (150 mil Body), 8-lead 37

CAD (KiCad official)

  • Symbol: MCP6074-E
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: mcp6074-e-etched.step / mcp6074-e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp6074-e.step / mcp6074-e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (40 pp, sha256 c31e01fe6edc94c1, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF