# MCP6042-I

**Microchip Tech** · Operational Amplifier · SOIC-8

MCP6042-I from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUTA | output | Analog output of op amp A, a low-impedance voltage source. |
| 2 | VINA- | input | Inverting input of op amp A, a high-impedance CMOS input with low bias current. |
| 3 | VINA+ | input | Non-inverting input of op amp A, a high-impedance CMOS input with low bias current. |
| 4 | VSS | power_in | Negative power supply, connected to ground in single-supply use; VDD must be 1.4V to 6.0V above it. |
| 5 | VINB+ | input | Non-inverting input of op amp B, a high-impedance CMOS input with low bias current. |
| 6 | VINB- | input | Inverting input of op amp B, a high-impedance CMOS input with low bias current. |
| 7 | VOUTB | output | Analog output of op amp B, a low-impedance voltage source. |
| 8 | VDD | power_in | Positive power supply, 1.4V to 6.0V above VSS, and needs bypass capacitors. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Amplifiers |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Current at Input Pins |  | -2 |  | 2 | mA |  | 2 |
| Analog Inputs (VIN+, VIN-) voltage |  | -1 |  | 1 | V | VSS, 1.0V to VDD + 1.0V (min relative to VSS, max relative to VDD) | 2 |
| All Other Inputs and Outputs voltage |  | -0.3 |  | 0.3 | V | VSS, 0.3V to VDD + 0.3V (min relative to VSS, max relative to VDD) | 2 |
| Current at Output and Supply Pins |  | -30 |  | 30 | mA |  | 2 |
| Storage Temperature |  | -65 |  | 150 | °C |  | 2 |
| Junction Temperature | TJ |  |  | 150 | °C |  | 2 |
| ESD protection HBM |  | 4 |  |  | kV | all pins, HBM | 2 |
| ESD protection MM |  | 200 |  |  | V | all pins, MM | 2 |
| Input Offset Voltage | VOS | -3 |  | 3 | mV | VCM = VSS | 2 |
| Power Supply Rejection | PSRR | 70 | 85 |  | dB | VCM = VSS | 2 |
| Input Bias Current, Industrial Temperature | IB |  | 20 | 100 | pA | TA = +85° | 2 |
| Common-Mode Input Range | VCMR | -0.3 |  | 0.3 | V | VSS−0.3 to VDD+0.3 (min relative to VSS, max relative to VDD) | 2 |
| Common-Mode Rejection Ratio | CMRR | 62 | 80 |  | dB | VDD = 5V, VCM = -0.3V to 5.3V | 2 |
| Common-Mode Rejection Ratio | CMRR | 60 | 75 |  | dB | VDD = 5V, VCM = 2.5V to 5.3V | 2 |
| Common-Mode Rejection Ratio | CMRR | 60 | 80 |  | dB | VDD = 5V, VCM = -0.3V to 2.5V | 2 |
| DC Open-Loop Gain (large signal) | AOL | 95 | 115 |  | dB | RL = 50 kΩ to VL, VOUT = 0.1V to VDD−0.1V | 2 |
| Maximum Output Voltage Swing (from rail) | VOL, VOH |  |  | 10 | mV | RL = 50 kΩ to VL, 0.5V input overdrive; VSS + 10 to VDD − 10 | 2 |
| Linear Region Output Voltage Swing (from rail) | VOVR |  |  | 100 | mV | RL = 50 kΩ to VL, AOL ≥ 95 dB; VSS + 100 to VDD − 100 | 2 |
| Supply Voltage | VDD | 1.4 |  | 6 | V | (Note 1) | 2 |
| Quiescent Current per Amplifier | IQ | 0.3 | 0.6 | 1 | µA | IO = 0 | 2 |
| Input Offset Voltage Drift | ΔVOS/ΔTA |  | 2 |  | µV/°C | VCM = VSS, TA= -40°C to +85°C (±2 typ) | 2 |
| Output Short Circuit Current | ISC |  | 2 |  | mA | VDD = 1.4V | 2 |
| Output Short Circuit Current | ISC |  | 20 |  | mA | VDD = 5.5V | 2 |
| Gain Bandwidth Product | GBWP |  | 14 |  | kHz |  | 3 |
| Slew Rate | SR |  | 3 |  | V/ms |  | 3 |
| Phase Margin | PM |  | 65 |  | ° | G = +1 V/V | 3 |
| Specified Temperature Range (Industrial) | TA | -40 |  | 85 | °C | Industrial Temperature parts | 4 |
| Operating Temperature Range | TA | -40 |  | 125 | °C | (Note 1) | 4 |
| Thermal Resistance, 8L-SOIC | θJA |  | 163 |  | °C/W |  | 4 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts |  | tin | SL = Plastic SOIC (150 mil Body), 14-lead SN = Plastic SOIC (150 mil Body), 8-lead | 37 |

## CAD (KiCad official)

- Symbol: `MCP6042-I`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `mcp6042-i-etched.step` / `mcp6042-i-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mcp6042-i.step` / `mcp6042-i.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Microchip Tech datasheet](docs/mcp6042-i-datasheet.pdf) (40 pp, sha256 `212e652e9a773641`, retrieved 2026-10-26, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/mcp6042-i-datasheet.pdf)