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MCP6034-E
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Microchip Tech Precision OpAmps, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MCP6034-E
Microchip Tech · Precision OpAmps · SOIC-14
MCP6034-E from Microchip Tech, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUTA | output | Analog output of op amp A; the output pins are low-impedance voltage sources. |
| 2 | VINA- | input | Inverting input of op amp A; a high-impedance CMOS input with low bias current. |
| 3 | VINA+ | input | Noninverting input of op amp A; a high-impedance CMOS input with low bias current. |
| 4 | VDD | power_in | Positive power supply, 1.8V to 5.5V higher than VSS; VDD will need bypass capacitors. |
| 5 | VINB+ | input | Noninverting input of op amp B; a high-impedance CMOS input with low bias current. |
| 6 | VINB- | input | Inverting input of op amp B; a high-impedance CMOS input with low bias current. |
| 7 | VOUTB | output | Analog output of op amp B; the output pins are low-impedance voltage sources. |
| 8 | VOUTC | output | Analog output of op amp C; the output pins are low-impedance voltage sources. |
| 9 | VINC- | input | Inverting input of op amp C; a high-impedance CMOS input with low bias current. |
| 10 | VINC+ | input | Noninverting input of op amp C; a high-impedance CMOS input with low bias current. |
| 11 | VSS | power_in | Negative power supply; in typical single-supply use it is connected to ground. |
| 12 | VIND+ | input | Noninverting input of op amp D; a high-impedance CMOS input with low bias current. |
| 13 | VIND- | input | Inverting input of op amp D; a high-impedance CMOS input with low bias current. |
| 14 | VOUTD | output | Analog output of op amp D; the output pins are low-impedance voltage sources. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-14 |
| Category | Operational Amplifier/Comparator |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Offset Voltage | VOS | -150 | 150 | µV | VDD = 3.0V, VCM = VDD/3 | 2 | |
| Power Supply Rejection Ratio | PSRR | 70 | 88 | dB | VCM = VSS | 2 | |
| Input Bias Current | IB | 1 | 100 | pA | 2 | ||
| Input Bias Current | IB | 2000 | 5000 | pA | TA = +125°C | 2 | |
| Common-mode Rejection Ratio | CMRR | 70 | 95 | dB | VCM = -0.3V to 2.1V, VDD = 1.8V | 2 | |
| Common-mode Rejection Ratio | CMRR | 72 | 93 | dB | VCM = -0.3V to 5.8V, VDD = 5.5V | 2 | |
| Common-mode Rejection Ratio | CMRR | 70 | 89 | dB | VCM = 2.75V to 5.8V, VDD = 5.5V | 2 | |
| DC Open-Loop Gain (Large Signal) | AOL | 95 | 115 | dB | 0.2V < VOUT < (VDD, 0.2V), RL = 50 k to VL | 2 | |
| Supply Voltage | VDD | 1.8 | 5.5 | V | 3 | ||
| Quiescent Current per Amplifier | IQ | 0.4 | 0.9 | 1.35 | µA | IO = 0, VCM = VDD, VDD = 5.5V | 3 |
| Operating Temperature Range | TA | -40 | 125 | °C | Note 1 | 5 | |
| Current at Input Pins | -2 | 2 | mA | 2 | |||
| Current at Output and Supply Pins | -30 | 30 | mA | 2 | |||
| Storage Temperature | TA | -65 | 150 | °C | 2 | ||
| Maximum Junction Temperature | TJ | 150 | °C | 2 | |||
| Thermal Resistance, 14-Lead SOIC | JA | 120 | °C/W | 5 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC] A A2 | 29 |
CAD (KiCad official)
- Symbol:
MCP6034-E - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
mcp6034-e-etched.step/mcp6034-e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp6034-e.step/mcp6034-e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (44 pp, sha256
90c498628e98ac93, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MCP6034-E
**Microchip Tech** · Precision OpAmps · SOIC-14
MCP6034-E from Microchip Tech, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUTA | output | Analog output of op amp A; the output pins are low-impedance voltage sources. |
| 2 | VINA- | input | Inverting input of op amp A; a high-impedance CMOS input with low bias current. |
| 3 | VINA+ | input | Noninverting input of op amp A; a high-impedance CMOS input with low bias current. |
| 4 | VDD | power_in | Positive power supply, 1.8V to 5.5V higher than VSS; VDD will need bypass capacitors. |
| 5 | VINB+ | input | Noninverting input of op amp B; a high-impedance CMOS input with low bias current. |
| 6 | VINB- | input | Inverting input of op amp B; a high-impedance CMOS input with low bias current. |
| 7 | VOUTB | output | Analog output of op amp B; the output pins are low-impedance voltage sources. |
| 8 | VOUTC | output | Analog output of op amp C; the output pins are low-impedance voltage sources. |
| 9 | VINC- | input | Inverting input of op amp C; a high-impedance CMOS input with low bias current. |
| 10 | VINC+ | input | Noninverting input of op amp C; a high-impedance CMOS input with low bias current. |
| 11 | VSS | power_in | Negative power supply; in typical single-supply use it is connected to ground. |
| 12 | VIND+ | input | Noninverting input of op amp D; a high-impedance CMOS input with low bias current. |
| 13 | VIND- | input | Inverting input of op amp D; a high-impedance CMOS input with low bias current. |
| 14 | VOUTD | output | Analog output of op amp D; the output pins are low-impedance voltage sources. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-14 |
| Category | Operational Amplifier/Comparator |
| Pins | 14 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Offset Voltage | VOS | -150 | | 150 | µV | VDD = 3.0V, VCM = VDD/3 | 2 |
| Power Supply Rejection Ratio | PSRR | 70 | 88 | | dB | VCM = VSS | 2 |
| Input Bias Current | IB | | 1 | 100 | pA | | 2 |
| Input Bias Current | IB | | 2000 | 5000 | pA | TA = +125°C | 2 |
| Common-mode Rejection Ratio | CMRR | 70 | 95 | | dB | VCM = -0.3V to 2.1V, VDD = 1.8V | 2 |
| Common-mode Rejection Ratio | CMRR | 72 | 93 | | dB | VCM = -0.3V to 5.8V, VDD = 5.5V | 2 |
| Common-mode Rejection Ratio | CMRR | 70 | 89 | | dB | VCM = 2.75V to 5.8V, VDD = 5.5V | 2 |
| DC Open-Loop Gain (Large Signal) | AOL | 95 | 115 | | dB | 0.2V < VOUT < (VDD, 0.2V), RL = 50 k to VL | 2 |
| Supply Voltage | VDD | 1.8 | | 5.5 | V | | 3 |
| Quiescent Current per Amplifier | IQ | 0.4 | 0.9 | 1.35 | µA | IO = 0, VCM = VDD, VDD = 5.5V | 3 |
| Operating Temperature Range | TA | -40 | | 125 | °C | Note 1 | 5 |
| Current at Input Pins | | -2 | | 2 | mA | | 2 |
| Current at Output and Supply Pins | | -30 | | 30 | mA | | 2 |
| Storage Temperature | TA | -65 | | 150 | °C | | 2 |
| Maximum Junction Temperature | TJ | | | 150 | °C | | 2 |
| Thermal Resistance, 14-Lead SOIC | JA | | 120 | | °C/W | | 5 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | | tin | 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC] A A2 | 29 |
## CAD (KiCad official)
- Symbol: `MCP6034-E`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files: `mcp6034-e-etched.step` / `mcp6034-e-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mcp6034-e.step` / `mcp6034-e.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](https://ww1.microchip.com/downloads/en/DeviceDoc/MCP6031-2-3-4-Data-Sheet-DS20002041C.pdf) (44 pp, sha256 `90c498628e98ac93`, retrieved 2026-10-30, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mcp6034-e-datasheet.pdf)