# MCP601-I

**Microchip Tech** · Operational Amplifier · TSSOP-8

MCP601-I from Microchip Tech, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No internal connection. |
| 2 | VIN- | power_in | Inverting input, a high-impedance CMOS input with low bias current. |
| 3 | VIN+ | power_in | Non-inverting input, a high-impedance CMOS input with low bias current; common mode range is VSS-0.3V to VDD-1.2V at +25°C. |
| 4 | VSS | power_in | Negative power supply, connected to ground in single-supply operation. |
| 5 | NC | unconnected | No internal connection. |
| 6 | VOUT | output | Analog output, a low-impedance rail-to-rail voltage source. |
| 7 | VDD | power_in | Positive power supply for a single-supply range of 2.7V to 6.0V, needing bypass capacitors. |
| 8 | NC | unconnected | No internal connection. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TSSOP-8 |
| Category | Operational Amplifier/Comparator |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Offset Voltage | VOS | -2 | 0.7 | 2 | mV | TA = +25°C | 2 |
| Input Offset Voltage, Industrial Temperature | VOS | -3 | 1 | 3 | mV | TA = -40°C to +85°C (Note 1) | 2 |
| Power Supply Rejection | PSRR | 80 | 88 |  | dB | VDD = 2.7V to 5.5V | 2 |
| Input Bias Current, Industrial Temperature | IB |  | 20 | 60 | pA | TA = +85°C (Note 1) | 2 |
| Common Mode Rejection Ratio | CMRR | 75 | 90 |  | dB | VDD = 5.0V, VCM = -0.3V to 3.8V | 2 |
| DC Open-loop Gain (large signal) | AOL | 100 | 115 |  | dB | RL = 25 kΩ to VL, VOUT = 0.1V to VDD, 0.1V | 2 |
| DC Open-loop Gain (large signal) | AOL | 95 | 110 |  | dB | RL = 5 kΩ to VL, VOUT = 0.1V to VDD, 0.1V | 2 |
| Supply Voltage | VDD | 2.7 |  | 6 | V | Note 2 | 2 |
| Quiescent Current per Amplifier | IQ |  | 230 | 325 | µA | IO = 0 | 2 |
| Specified Temperature Range (Industrial) | TA | -40 |  | 85 | °C | Industrial temperature parts | 4 |
| Operating Temperature Range | TA | -40 |  | 125 | °C | Industrial parts operate over this range with reduced performance | 4 |
| Storage Temperature Range | TA | -65 |  | 150 | °C |  | 4 |
| Supply Voltage VDD, VSS | VDD-VSS |  |  | 7 | V |  | 2 |
| Current at Input Pins |  | -2 |  | 2 | mA | ±2 mA | 2 |
| Current at Output and Supply Pins |  | -30 |  | 30 | mA | ±30 mA | 2 |
| Storage Temperature |  | -65 |  | 150 | °C |  | 2 |
| Maximum Junction Temperature | TJ |  |  | 150 | °C |  | 2 |
| ESD Protection (HBM) |  | 3 |  |  | kV | All pins, HBM ≥ 3 kV | 2 |
| ESD Protection (MM) |  | 200 |  |  | V | All pins, MM 200V | 2 |
| Thermal Resistance, 8L-TSSOP | θJA |  | 124 |  | °C/W |  | 4 |
| Input Offset Temperature Drift | ΔVOS/ΔTA |  | 2.5 |  | µV/°C | TA = -40°C to +125°C (printed ±2.5) | 2 |
| Input Bias Current | IB |  | 1 |  | pA | TA = +25°C | 2 |
| Input Offset Current | IOS |  | 1 |  | pA | printed ±1 | 2 |
| Output Short Circuit Current | ISC |  | 22 |  | mA | VDD = 5.5V (printed ±22) | 2 |
| Output Short Circuit Current | ISC |  | 12 |  | mA | VDD = 2.7V (printed ±12) | 2 |
| Gain Bandwidth Product | GBWP |  | 2.8 |  | MHz |  | 3 |
| Phase Margin | PM |  | 50 |  | ° | G = +1 V/V | 3 |
| Slew Rate | SR |  | 2.3 |  | V/µs | G = +1 V/V | 3 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts |  | tin | P = Plastic DIP (300 mil body), 8, 14 lead SN = Plastic SOIC (3.90 mm body), 8 lead | 31 |

## CAD (KiCad official)

- Symbol: `MCP601-I`
- Footprint: `Package_SO:TSSOP-8_3x3mm_P0.65mm`
- 3D model: TSSOP-8 (KiCad packages3D, STEP)
- 3D model files: `mcp601-i-etched.step` / `mcp601-i-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mcp601-i.step` / `mcp601-i.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Microchip Tech datasheet](docs/mcp601-i-datasheet.pdf) (34 pp, sha256 `bd8b64186a1924f8`, retrieved 2026-10-23, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/mcp601-i-datasheet.pdf)