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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs mcp6004t-i: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
mcp6004t-i-etched.fit.json mcp6004t-i: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
mcp6004t-i-etched.glb mcp6004t-i: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
mcp6004t-i-etched.step mcp6004t-i: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
mcp6004t-i.glb Publish 0.1.0 · Ray 1mo ago
mcp6004t-i.kicad_mod Publish 0.1.0 · Ray 1mo ago
mcp6004t-i.kicad_sym Publish 0.1.0 · Ray 1mo ago
mcp6004t-i.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect and oval pad as a SQUARE EAGLE smd; this carries the real pad shape across (0 -> 14 rounded pads) and stops dropping geometry drawn on KiCad User.N layers. Attributes, connects, pads and the pin-1 marker are gated against decreasing and are unchanged. · Ray 1mo ago
mcp6004t-i.step Publish 0.1.0 · Ray 1mo ago
package.json Publish 0.2.0 · Ray 1mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 7d ago
README.md mcp6004t-i: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 16d ago

MCP6004T-I

Microchip Tech · Operational Amplifier · SOIC-14

MCP6004T-I from Microchip Tech, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUTA output Op-amp A output. Rail-to-rail output swing to within ~25 mV of VSS/VDD with 10 kΩ load; short-circuit current ±23 mA typ at VDD=5.5V.
2 VINA- input Op-amp A inverting input. Common-mode input range VSS−0.3V to VDD+0.3V (rail-to-rail input). Input bias current ±1 pA typ (25°C).
3 VINA+ input Op-amp A non-inverting input. Rail-to-rail common-mode range VSS−0.3V to VDD+0.3V.
4 VDD power_in Positive supply. Operating range 1.8V to 6.0V. Bypass with 100 nF ceramic close to the pin. Absolute maximum VDD−VSS = 7.0V.
5 VINB+ input Op-amp B non-inverting input. Rail-to-rail common-mode range VSS−0.3V to VDD+0.3V.
6 VINB- input Op-amp B inverting input. Input bias current ±1 pA typ (25°C).
7 VOUTB output Op-amp B output. Rail-to-rail output; can source/sink ±23 mA typ at VDD=5.5V.
8 VOUTC output Op-amp C output. Rail-to-rail output swing.
9 VINC- input Op-amp C inverting input.
10 VINC+ input Op-amp C non-inverting input. Rail-to-rail common-mode range.
11 VSS power_in Negative supply / ground reference. Tie to system ground for single-supply operation.
12 VIND+ input Op-amp D non-inverting input. Rail-to-rail common-mode range.
13 VIND- input Op-amp D inverting input.
14 VOUTD output Op-amp D output. Rail-to-rail output swing.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-14
Category Op-amp/Cmp
Pins 14

Ordering variants

Same part, different packaging or reel option.

  • MCP6004T-II/SL
  • MCP6004T-IE/SL
  • MCP6004T-II/ST
  • MCP6004T-IE/ST
  • MCP6004T-II/P
  • MCP6004T-IE/P

CAD (KiCad official)

  • Symbol: MCP6004T-I
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: mcp6004t-i-etched.step / mcp6004t-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp6004t-i.step / mcp6004t-i.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
mcp6004t-i.step 195 KB You want the bare part, or you mark your own boards.
mcp6004t-i-etched.step 2.2 MB You want the part with MCP6004T-I already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 566 faces against 237 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (42 pp, sha256 118ef9c38ace141e, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF