# MCP6004-E

**Microchip Tech** · Operational Amplifier · PDIP-14

MCP6004-E from Microchip Tech, in a PDIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUTA | output | Analog output of op amp A; the output pins are low-impedance voltage sources. |
| 2 | VINA- | input | Inverting input of op amp A; a high-impedance CMOS input with low bias current. |
| 3 | VINA+ | input | Noninverting input of op amp A; a high-impedance CMOS input with low bias current. |
| 4 | VDD | power_in | Positive power supply, 1.8V to 6.0V higher than VSS; VDD will need bypass capacitors. |
| 5 | VINB+ | input | Noninverting input of op amp B; a high-impedance CMOS input with low bias current. |
| 6 | VINB- | input | Inverting input of op amp B; a high-impedance CMOS input with low bias current. |
| 7 | VOUTB | output | Analog output of op amp B; a low-impedance voltage source. |
| 8 | VOUTC | output | Analog output of op amp C; a low-impedance voltage source. |
| 9 | VINC- | input | Inverting input of op amp C; a high-impedance CMOS input with low bias current. |
| 10 | VINC+ | input | Noninverting input of op amp C; a high-impedance CMOS input with low bias current. |
| 11 | VSS | power_in | Negative power supply; connected to ground for single-supply operation. |
| 12 | VIND+ | input | Noninverting input of op amp D; a high-impedance CMOS input with low bias current. |
| 13 | VIND- | input | Inverting input of op amp D; a high-impedance CMOS input with low bias current. |
| 14 | VOUTD | output | Analog output of op amp D; a low-impedance voltage source. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | PDIP-14 |
| Category | Amplifiers/Comparators |
| Pins | 14 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Offset Voltage | VOS | -4.5 |  | 4.5 | mV | VCM = VSS (Note 1) | 3 |
| Common-Mode Input Range, printed VSS, 0.3 to VDD + 0.3 V (stored as offset from VSS and from VDD) | VCMR | -0.3 |  | 0.3 | V |  | 3 |
| Common-Mode Rejection Ratio | CMRR | 60 | 76 |  | dB | VCM = -0.3V to 5.3V, VDD = 5V | 3 |
| DC Open-Loop Gain (Large Signal) | AOL | 88 | 112 |  | dB | VOUT = 0.3V to VDD, 0.3V, VCM =VSS | 3 |
| Maximum Output Voltage Swing (printed min VSS + 25 mV stored as +25; max VDD, 25 mV stored as -25) | VOL, VOH | 25 |  | -25 | mV | VDD = 5.5V, 0.5V input overdrive | 3 |
| Quiescent Current per Amplifier | IQ | 50 | 100 | 170 | µA | IO = 0, VDD = 5.5V, VCM = 5V | 3 |
| Supply Voltage | VDD | 1.8 |  | 6 | V | Note 2 | 3 |
| Industrial Temperature Range | TA | -40 |  | 85 | °C |  | 4 |
| Extended Temperature Range | TA | -40 |  | 125 | °C |  | 4 |
| Operating Temperature Range | TA | -40 |  | 125 | °C | Note 1 | 4 |
| Storage Temperature Range | TA | -65 |  | 150 | °C |  | 4 |
| Analog Inputs (VIN+, VIN-), printed VSS, 1.0V to VDD + 1.0V (stored as offset from rails) | VIN | -1 |  | 1 | V |  | 3 |
| All Other Inputs and Outputs, printed VSS, 0.3V to VDD + 0.3V (stored as offset from rails) |  | -0.3 |  | 0.3 | V |  | 3 |
| VDD, VSS | VDD-VSS |  |  | 7 | V |  | 3 |
| Current at Analog Input Pins (VIN+, VIN-) |  | -2 |  | 2 | mA |  | 3 |
| Current at Output and Supply Pins |  | -30 |  | 30 | mA |  | 3 |
| Maximum Junction Temperature | TJ |  |  | 150 | °C |  | 3 |
| Input Offset Drift with Temperature (printed ±2.0) | VOS/TA |  | 2 |  | µV/°C | TA= -40°C to +125°C, VCM = VSS | 3 |
| Power Supply Rejection Ratio | PSRR |  | 86 |  | dB | VCM = VSS | 3 |
| Input Bias Current (printed ±1.0) | IB |  | 1 |  | pA |  | 3 |
| Input Bias Current, Industrial Temperature | IB |  | 19 |  | pA | TA = +85°C | 3 |
| Input Bias Current, Extended Temperature | IB |  | 1100 |  | pA | TA = +125°C | 3 |
| Input Offset Current (printed ±1.0) | IOS |  | 1 |  | pA |  | 3 |
| Output Short-Circuit Current (printed ±6) | ISC |  | 6 |  | mA | VDD = 1.8V | 3 |
| Output Short-Circuit Current (printed ±23) | ISC |  | 23 |  | mA | VDD = 5.5V | 3 |
| Gain Bandwidth Product | GBWP |  | 1 |  | MHz |  | 4 |
| Phase Margin | PM |  | 90 |  | ° | G = +1 V/V | 4 |
| Slew Rate | SR |  | 0.6 |  | V/µs |  | 4 |
| Input Noise Voltage | Eni |  | 6.1 |  | µVp-p | f = 0.1 Hz to 10 Hz | 4 |
| Input Noise Voltage Density | eni |  | 28 |  | nV/Hz | f = 1 kHz | 4 |
| Input Noise Current Density | ini |  | 0.6 |  | fA/Hz | f = 1 kHz | 4 |
| Thermal Resistance, 14-Lead PDIP | JA |  | 70 |  | °C/W |  | 4 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts |  | tin | 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC] A A2 | 31 |

## CAD (KiCad official)

- Symbol: `MCP6004-E`
- Footprint: `Package_DIP:DIP-14_W7.62mm`
- 3D model: PDIP-14 (KiCad packages3D, STEP)
- 3D model files: `mcp6004-e-etched.step` / `mcp6004-e-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mcp6004-e.step` / `mcp6004-e.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Microchip Tech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590210111781171200) (50 pp, sha256 `a9b33cface59f4cd`, retrieved 2026-10-16, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/mcp6004-e-datasheet.pdf)