component
MCP4811-E
Public Made by Adomby adom
Microchip Tech Digital To Analog Converters (DACs), MSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MCP4811-E
Microchip Tech · Digital To Analog Converters (DACs) · MSOP-8
MCP4811-E from Microchip Tech, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Positive supply voltage input, 2.7V to 5.5V relative to VSS, with a 0.1 µF ceramic bypass capacitor (plus 10 µF tantalum) recommended. |
| 2 | CS | input | Active-low Chip Select input that enables the serial clock and data functions. |
| 3 | SCK | input | SPI compatible serial clock input. |
| 4 | SDI | input | SPI compatible serial data input. |
| 5 | LDAC | input | Latch DAC synchronization input that transfers the input register to the output register (VOUT) when low; can be tied to VSS for update on the rising edge of CS. |
| 6 | SHDN | input | Hardware shutdown input. |
| 7 | VSS | power_in | Analog ground reference point for all circuitry and current return path, to be connected to a low-impedance ground plane. |
| 8 | VOUT | output | Buffered DAC analog output with full-scale range from VSS to G*VREF (G = 1x or 2x), which cannot exceed VDD. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | MSOP-8 |
| Category | ADC/DAC/Data Conversion |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Voltage | VDD | 2.7 | 5.5 | V | 3 | ||
| Operating Current | IDD | 330 | 400 | µA | All digital inputs grounded, VOUT unloaded, Code = 000h | 3 | |
| Hardware Shutdown Current | ISHDN | 0.3 | 2 | µA | POR circuit is turned off | 3 | |
| Software Shutdown Current | ISHDN_SW | 3.3 | 6 | µA | POR circuit remains turned on | 3 | |
| Resolution (MCP4811) | n | 10 | Bits | 3 | |||
| INL Error (MCP4811) | INL | -3.5 | 0.5 | 3.5 | LSb | 3 | |
| DNL (MCP4811) | DNL | -0.5 | 0.1 | 0.5 | LSb | Guaranteed monotonic by design over all codes | 3 |
| Offset Error | VOS | -1 | 0.02 | 1 | % of FSR | Code = 0x000h | 3 |
| Gain Error | gE | -2 | -0.1 | 2 | % of FSR | Code = 0xFFFh, not including offset error | 3 |
| Internal Reference Voltage | VREF | 2.008 | 2.048 | 2.088 | V | VOUT when G = 1x and Code = 0xFFFh | 4 |
| VREF Temperature Coefficient | ΔVREF/°C | 125 | 325 | ppm/°C | -40°C to 0°C | 4 | |
| VREF Temperature Coefficient | ΔVREF/°C | 0.25 | 0.65 | LSb/°C | -40°C to 0°C | 4 | |
| VREF Temperature Coefficient | ΔVREF/°C | 45 | 160 | ppm/°C | 0°C to +85°C | 4 | |
| VREF Temperature Coefficient | ΔVREF/°C | 0.09 | 0.32 | LSb/°C | 0°C to +85°C | 4 | |
| Short Circuit Current | ISC | 15 | 24 | mA | 4 | ||
| Schmitt Trigger High-Level Input Voltage | VIH | 0.7 | V | Min is 0.7 VDD; all digital input pins | 6 | ||
| Schmitt Trigger Low-Level Input Voltage | VIL | 0.2 | V | Max is 0.2 VDD; all digital input pins | 6 | ||
| Input Leakage Current | ILEAKAGE | -1 | 1 | µA | SHDN = LDAC = CS = SDI = SCK = VDD or VSS | 6 | |
| Clock Frequency | FCLK | 20 | MHz | TA = +25°C (Note 1) | 6 | ||
| Clock High Time | tHI | 15 | ns | Note 1 | 6 | ||
| Clock Low Time | tLO | 15 | ns | Note 1 | 6 | ||
| CS Fall to First Rising CLK Edge | tCSSR | 40 | ns | Applies only when CS falls with CLK high. (Note 1) | 6 | ||
| Data Input Setup Time | tSU | 15 | ns | Note 1 | 6 | ||
| Data Input Hold Time | tHD | 10 | ns | Note 1 | 6 | ||
| SCK Rise to CS Rise Hold Time | tCHS | 15 | ns | Note 1 | 6 | ||
| CS High Time | tCSH | 15 | ns | Note 1 | 6 | ||
| LDAC Pulse Width | tLD | 100 | ns | Note 1 | 6 | ||
| LDAC Setup Time | tLS | 40 | ns | Note 1 | 6 | ||
| SCK Idle Time before CS Fall | tIDLE | 40 | ns | Note 1 | 6 | ||
| Supply Voltage | VDD | 6.5 | V | 3 | |||
| Voltage on all inputs and outputs | -0.3 | 0.3 | V | VSS, 0.3V to VDD + 0.3V (min relative to VSS, max relative to VDD) | 3 | ||
| Current at Input Pins | -2 | 2 | mA | 3 | |||
| Current at Supply Pins | -50 | 50 | mA | 3 | |||
| Current at Output Pins | -25 | 25 | mA | 3 | |||
| Storage temperature | -65 | 150 | °C | 3 | |||
| Ambient temp. with power applied | -55 | 125 | °C | 3 | |||
| Maximum Junction Temperature | TJ | 150 | °C | 3 | |||
| ESD protection on all pins (HBM) | 4 | kV | HBM; MM 400V | 3 | |||
| Specified Temperature Range | TA | -40 | 125 | °C | 7 | ||
| Operating Temperature Range | TA | -40 | 125 | °C | Note 1 | 7 | |
| Thermal Resistance, 8L-MSOP | θJA | 211 | °C/W | 7 | |||
| Power-on Reset Threshold | VPOR | 2 | V | 3 | |||
| Settling Time | tSETTLING | 4.5 | µs | Within ½ LSb of final value from ¼ to ¾ full-scale range | 4 | ||
| Slew Rate | SR | 0.55 | V/µs | 4 | |||
| Gain Error Temperature Coefficient | ΔG/°C | -3 | ppm/°C | 3 | |||
| Digital Pin Capacitance | CIN, COUT | 10 | pF | VDD = 5.0V, TA = +25°C, fCLK = 1 MHz (Note 1) | 6 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | P = 8-Lead Plastic Dual In-Line (PDIP) SN = 8-Lead Plastic Small Outline - Narrow, 150 mil | 45 |
CAD (KiCad official)
- Symbol:
MCP4811-E - Footprint:
Package_SO:MSOP-8_3x3mm_P0.65mm - 3D model: MSOP-8 (KiCad packages3D, STEP)
- 3D model files:
mcp4811-e-etched.step/mcp4811-e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp4811-e.step/mcp4811-e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (48 pp, sha256
e4bf1d222bf746ef, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MCP4811-E
**Microchip Tech** · Digital To Analog Converters (DACs) · MSOP-8
MCP4811-E from Microchip Tech, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Positive supply voltage input, 2.7V to 5.5V relative to VSS, with a 0.1 µF ceramic bypass capacitor (plus 10 µF tantalum) recommended. |
| 2 | CS | input | Active-low Chip Select input that enables the serial clock and data functions. |
| 3 | SCK | input | SPI compatible serial clock input. |
| 4 | SDI | input | SPI compatible serial data input. |
| 5 | LDAC | input | Latch DAC synchronization input that transfers the input register to the output register (VOUT) when low; can be tied to VSS for update on the rising edge of CS. |
| 6 | SHDN | input | Hardware shutdown input. |
| 7 | VSS | power_in | Analog ground reference point for all circuitry and current return path, to be connected to a low-impedance ground plane. |
| 8 | VOUT | output | Buffered DAC analog output with full-scale range from VSS to G*VREF (G = 1x or 2x), which cannot exceed VDD. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | MSOP-8 |
| Category | ADC/DAC/Data Conversion |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Voltage | VDD | 2.7 | | 5.5 | V | | 3 |
| Operating Current | IDD | | 330 | 400 | µA | All digital inputs grounded, VOUT unloaded, Code = 000h | 3 |
| Hardware Shutdown Current | ISHDN | | 0.3 | 2 | µA | POR circuit is turned off | 3 |
| Software Shutdown Current | ISHDN_SW | | 3.3 | 6 | µA | POR circuit remains turned on | 3 |
| Resolution (MCP4811) | n | 10 | | | Bits | | 3 |
| INL Error (MCP4811) | INL | -3.5 | 0.5 | 3.5 | LSb | | 3 |
| DNL (MCP4811) | DNL | -0.5 | 0.1 | 0.5 | LSb | Guaranteed monotonic by design over all codes | 3 |
| Offset Error | VOS | -1 | 0.02 | 1 | % of FSR | Code = 0x000h | 3 |
| Gain Error | gE | -2 | -0.1 | 2 | % of FSR | Code = 0xFFFh, not including offset error | 3 |
| Internal Reference Voltage | VREF | 2.008 | 2.048 | 2.088 | V | VOUT when G = 1x and Code = 0xFFFh | 4 |
| VREF Temperature Coefficient | ΔVREF/°C | | 125 | 325 | ppm/°C | -40°C to 0°C | 4 |
| VREF Temperature Coefficient | ΔVREF/°C | | 0.25 | 0.65 | LSb/°C | -40°C to 0°C | 4 |
| VREF Temperature Coefficient | ΔVREF/°C | | 45 | 160 | ppm/°C | 0°C to +85°C | 4 |
| VREF Temperature Coefficient | ΔVREF/°C | | 0.09 | 0.32 | LSb/°C | 0°C to +85°C | 4 |
| Short Circuit Current | ISC | | 15 | 24 | mA | | 4 |
| Schmitt Trigger High-Level Input Voltage | VIH | 0.7 | | | V | Min is 0.7 VDD; all digital input pins | 6 |
| Schmitt Trigger Low-Level Input Voltage | VIL | | | 0.2 | V | Max is 0.2 VDD; all digital input pins | 6 |
| Input Leakage Current | ILEAKAGE | -1 | | 1 | µA | SHDN = LDAC = CS = SDI = SCK = VDD or VSS | 6 |
| Clock Frequency | FCLK | | | 20 | MHz | TA = +25°C (Note 1) | 6 |
| Clock High Time | tHI | 15 | | | ns | Note 1 | 6 |
| Clock Low Time | tLO | 15 | | | ns | Note 1 | 6 |
| CS Fall to First Rising CLK Edge | tCSSR | 40 | | | ns | Applies only when CS falls with CLK high. (Note 1) | 6 |
| Data Input Setup Time | tSU | 15 | | | ns | Note 1 | 6 |
| Data Input Hold Time | tHD | 10 | | | ns | Note 1 | 6 |
| SCK Rise to CS Rise Hold Time | tCHS | 15 | | | ns | Note 1 | 6 |
| CS High Time | tCSH | 15 | | | ns | Note 1 | 6 |
| LDAC Pulse Width | tLD | 100 | | | ns | Note 1 | 6 |
| LDAC Setup Time | tLS | 40 | | | ns | Note 1 | 6 |
| SCK Idle Time before CS Fall | tIDLE | 40 | | | ns | Note 1 | 6 |
| Supply Voltage | VDD | | | 6.5 | V | | 3 |
| Voltage on all inputs and outputs | | -0.3 | | 0.3 | V | VSS, 0.3V to VDD + 0.3V (min relative to VSS, max relative to VDD) | 3 |
| Current at Input Pins | | -2 | | 2 | mA | | 3 |
| Current at Supply Pins | | -50 | | 50 | mA | | 3 |
| Current at Output Pins | | -25 | | 25 | mA | | 3 |
| Storage temperature | | -65 | | 150 | °C | | 3 |
| Ambient temp. with power applied | | -55 | | 125 | °C | | 3 |
| Maximum Junction Temperature | TJ | | | 150 | °C | | 3 |
| ESD protection on all pins (HBM) | | 4 | | | kV | HBM; MM 400V | 3 |
| Specified Temperature Range | TA | -40 | | 125 | °C | | 7 |
| Operating Temperature Range | TA | -40 | | 125 | °C | Note 1 | 7 |
| Thermal Resistance, 8L-MSOP | θJA | | 211 | | °C/W | | 7 |
| Power-on Reset Threshold | VPOR | | 2 | | V | | 3 |
| Settling Time | tSETTLING | | 4.5 | | µs | Within ½ LSb of final value from ¼ to ¾ full-scale range | 4 |
| Slew Rate | SR | | 0.55 | | V/µs | | 4 |
| Gain Error Temperature Coefficient | ΔG/°C | | -3 | | ppm/°C | | 3 |
| Digital Pin Capacitance | CIN, COUT | | 10 | | pF | VDD = 5.0V, TA = +25°C, fCLK = 1 MHz (Note 1) | 6 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | | tin | P = 8-Lead Plastic Dual In-Line (PDIP) SN = 8-Lead Plastic Small Outline - Narrow, 150 mil | 45 |
## CAD (KiCad official)
- Symbol: `MCP4811-E`
- Footprint: `Package_SO:MSOP-8_3x3mm_P0.65mm`
- 3D model: MSOP-8 (KiCad packages3D, STEP)
- 3D model files: `mcp4811-e-etched.step` / `mcp4811-e-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mcp4811-e.step` / `mcp4811-e.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](docs/mcp4811-e-datasheet.pdf) (48 pp, sha256 `e4bf1d222bf746ef`, retrieved 2026-10-30, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mcp4811-e-datasheet.pdf)