MCP4801T-E

{
  "slug": "mcp4801t-e",
  "version": "0.1.0",
  "type": "component",
  "description": "Microchip Tech Digital To Analog Converters (DACs), SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "adc-dac-data conversion",
    "mcp4801t-e",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "mcp4801t-e.kicad_sym",
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    "mcp4801t-e.glb",
    "mcp4801t-e.step",
    "mcp4801t-e.lbr",
    "docs/hero.png",
    "docs/mcp4801t-e-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "mcp4801t-e-hero.glb",
    "mcp4801t-e-hero.overlay.json",
    "mcp4801t-e-etched.glb"
  ],
  "component": {
    "mpn": "MCP4801T-E",
    "manufacturer": "Microchip Tech",
    "package": "SOIC-8",
    "pin_count": 8,
    "category": "ADC/DAC/Data Conversion",
    "subcategory": "Digital To Analog Converters (DACs)",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/a1aa98bd72ca43fea07ed03bba90e038.pdf",
    "parts": {
      "symbol": "mcp4801t-e.kicad_sym",
      "footprint": "mcp4801t-e.kicad_mod",
      "model_3d": "mcp4801t-e-hero.glb",
      "model_3d_plain": "mcp4801t-e-etched.glb",
      "model_3d_step": "mcp4801t-e-etched.step",
      "model_3d_step_plain": "mcp4801t-e.step",
      "lbr": "mcp4801t-e.lbr"
    },
    "distributor_links": {
      "lcsc": "C623648"
    },
    "distributor_check": {
      "checked_at": "2026-10-28T23:39:59Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "deferred",
        "error": "shared DigiKey quota guard: 990 calls left today"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply voltage input, specified from 2.7V to 5.5V relative to VSS; a 0.1 µF ceramic bypass to ground plus a 10 µF tantalum capacitor in parallel is recommended."
      },
      {
        "number": "2",
        "name": "CS",
        "type": "input",
        "description": "Active-low Chip Select input that must be low to enable the serial clock and data functions."
      },
      {
        "number": "3",
        "name": "SCK",
        "type": "input",
        "description": "SPI-compatible serial clock input."
      },
      {
        "number": "4",
        "name": "SDI",
        "type": "input",
        "description": "SPI-compatible serial data input."
      },
      {
        "number": "5",
        "name": "LDAC",
        "type": "input",
        "description": "DAC output synchronization input: when low, the input register content is transferred to the output register and VOUT is updated, and it can be tied to VSS to update VOUT on the rising edge of CS."
      },
      {
        "number": "6",
        "name": "SHDN",
        "type": "input",
        "description": "Hardware Shutdown input that places the device in Shutdown mode, where most internal circuits including the output amplifier are turned off and VOUT is presented as a known high-resistance load (500 kΩ typical)."
      },
      {
        "number": "7",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground reference point for all circuitry and the current return path; it should be connected to a low-impedance ground plane (analog ground if available)."
      },
      {
        "number": "8",
        "name": "VOUT",
        "type": "output",
        "description": "DAC analog output with rail-to-rail output amplifier; full-scale range is VSS to G×VREF (G = 1x or 2x) and it cannot go higher than VDD."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The provided pages (1, 14-16, 24-26, 34-37) do not include the ordering information table, so the ma; Pin 1 of the SOIC column is printed in the garbled table text as '1 1VDD'; the first numeric column ; The SHDN pin's active level (polarity) is not stated in the provided pages; the description covers o"
        ],
        "pages_sent": 11,
        "cost_usd": 0.0378,
        "at": "2026-10-28T23:39:37"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/a1aa98bd72ca43fea07ed03bba90e038.pdf",
        "pages": 48,
        "sha256": "e4bf1d222bf746ef",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
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      "footprint": "viewers/footprint.html"
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        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-28",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
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        "zmin_mm": -0.0,
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        "sha256": "5f2dd072240e072eb96883620ad968fc03d48148ccf49736d5a9dab1945b347e",
        "checked": "2026-10-28",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
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  }
}