component

MCP4801T-E

Public Made by Adom

by adom

Microchip Tech Digital To Analog Converters (DACs), SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentadc-dac-data conversionmcp4801t-efactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
mcp4801t-e / README.md
History Download
Ray Publish 0.1.0 31442fd 9d ago

MCP4801T-E

Microchip Tech · Digital To Analog Converters (DACs) · SOIC-8

MCP4801T-E from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Positive supply voltage input, specified from 2.7V to 5.5V relative to VSS; a 0.1 µF ceramic bypass to ground plus a 10 µF tantalum capacitor in parallel is recommended.
2 CS input Active-low Chip Select input that must be low to enable the serial clock and data functions.
3 SCK input SPI-compatible serial clock input.
4 SDI input SPI-compatible serial data input.
5 LDAC input DAC output synchronization input: when low, the input register content is transferred to the output register and VOUT is updated, and it can be tied to VSS to update VOUT on the rising edge of CS.
6 SHDN input Hardware Shutdown input that places the device in Shutdown mode, where most internal circuits including the output amplifier are turned off and VOUT is presented as a known high-resistance load (500 kΩ typical).
7 VSS power_in Ground reference point for all circuitry and the current return path; it should be connected to a low-impedance ground plane (analog ground if available).
8 VOUT output DAC analog output with rail-to-rail output amplifier; full-scale range is VSS to G×VREF (G = 1x or 2x) and it cannot go higher than VDD.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8
Category ADC/DAC/Data Conversion
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Voltage VDD 2.7 5.5 V 3
Operating Current IDD 330 400 µA All digital inputs are grounded, analog output (VOUT) is unloaded. Code = 000h 3
Hardware Shutdown Current ISHDN 0.3 2 µA POR circuit is turned off 3
Software Shutdown Current ISHDN_SW 3.3 6 µA POR circuit remains turned on 3
MCP4801 Resolution n 8 Bits 3
INL Error (MCP4801) INL -1 0.125 1 LSb 3
DNL (MCP4801) DNL -0.5 0.1 0.5 LSb Note 1: Guaranteed monotonic by design over all codes. 3
Offset Error VOS -1 0.02 1 % of FSR Code = 0x000h 3
Gain Error gE -2 -0.1 2 % of FSR Code = 0xFFFh, not including offset error 3
Internal Reference Voltage VREF 2.008 2.048 2.088 V VOUT when G = 1x and Code = 0xFFFh 4
Internal Reference Temperature Coefficient (-40°C to 0°C) VREF/°C 125 325 ppm/°C -40°C to 0°C 4
Internal Reference Temperature Coefficient (-40°C to 0°C) VREF/°C 0.25 0.65 LSb/°C -40°C to 0°C 4
Internal Reference Temperature Coefficient (0°C to +85°C) VREF/°C 45 160 ppm/°C 0°C to +85°C 4
Internal Reference Temperature Coefficient (0°C to +85°C) VREF/°C 0.09 0.32 LSb/°C 0°C to +85°C 4
Output Swing (lower limit; upper limit printed as VDD, 0.04 V) VOUT 0.01 V Accuracy is better than 1 LSb for VOUT = 10 mV to (VDD, 40 mV) 4
Short Circuit Current ISC 15 24 mA 4
Input Leakage Current ILEAKAGE -1 1 µA SHDN = LDAC = CS = SDI = SCK = VDD or VSS 6
Clock Frequency FCLK 20 MHz TA = +25°C (Note 1) 6
Clock High Time tHI 15 ns Note 1: ensured by design, not 100% tested 6
Clock Low Time tLO 15 ns Note 1: ensured by design, not 100% tested 6
CS Fall to First Rising CLK Edge tCSSR 40 ns Applies only when CS falls with CLK high. (Note 1) 6
Data Input Setup Time tSU 15 ns Note 1: ensured by design, not 100% tested 6
Data Input Hold Time tHD 10 ns Note 1: ensured by design, not 100% tested 6
SCK Rise to CS Rise Hold Time tCHS 15 ns Note 1: ensured by design, not 100% tested 6
CS High Time tCSH 15 ns Note 1: ensured by design, not 100% tested 6
LDAC Pulse Width tLD 100 ns Note 1: ensured by design, not 100% tested 6
LDAC Setup Time tLS 40 ns Note 1: ensured by design, not 100% tested 6
SCK Idle Time before CS Fall tIDLE 40 ns Note 1: ensured by design, not 100% tested 6
Specified Temperature Range TA -40 125 °C 7
Operating Temperature Range TA -40 125 °C Note 1: operation must not cause TJ to exceed +150°C 7
Storage Temperature Range TA -65 150 °C 7
Thermal Resistance, 8L-SOIC JA 150 °C/W 7
VDD Supply Voltage (absolute maximum) VDD 6.5 V 3
Current at Input Pins IIN -2 2 mA 3
Current at Supply Pins ISUPPLY -50 50 mA 3
Current at Output Pins IOUT -25 25 mA 3
Ambient Temperature with Power Applied TA -55 125 °C 3
Maximum Junction Temperature TJ 150 °C 3

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin P = 8-Lead Plastic Dual In-Line (PDIP) SN = 8-Lead Plastic Small Outline - Narrow, 150 mil 45

CAD (KiCad official)

  • Symbol: MCP4801T-E
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: mcp4801t-e-etched.step / mcp4801t-e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp4801t-e.step / mcp4801t-e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (48 pp, sha256 e4bf1d222bf746ef, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF