component
MCP4726A1T-E
Public Made by Adomby adom
Microchip Tech Digital To Analog Converters (DACs), SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
MCP4726A1T-E
Microchip Tech · Digital To Analog Converters (DACs) · SOT-23-6
MCP4726A1T-E from Microchip Tech, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | output | Buffered analog voltage output of the DAC that swings from approximately 0V to approximately VDD, with about 1 Ω DC output impedance in Normal mode and a 1 kΩ, 125 kΩ or 640 kΩ pull-down in Power-Down mode. |
| 2 | VSS | power_in | Ground reference for all circuitry on the device, to be connected to a ground plane (preferably analog ground) through a low-impedance connection. |
| 3 | VDD | power_in | Positive supply input (2.7V to 5.5V) relative to VSS, to be bypassed with about 0.1 µF ceramic in parallel with 10 µF tantalum placed within 4 mm of the pin. |
| 4 | SDA | bidirectional | I2C serial data pin with an open-drain N-channel driver that needs a pull-up resistor to VDD, and data must be stable while SCL is high except for Start and Stop conditions. |
| 5 | SCL | input | I2C serial clock input (open-drain, slave-only device accepting only external clocks) that needs a pull-up resistor to VDD, supporting 100 kHz, 400 kHz and 3.4 MHz modes. |
| 6 | VREF | power_in | External voltage reference input selectable as the DAC reference (buffered or unbuffered, with gain 1x or 2x limited to VDD/2 maximum at 2x), and disconnected from the internal circuit when VDD is selected as reference. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOT-23-6 |
| Category | ADC/DAC/Data Conversion |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VDD | 2.7 | 5.5 | V | 4 | ||
| Input Current | IDD | 210 | 400 | µA | VREF1:VREF0 = 00, SCL = SDA = VSS, VOUT is unloaded, volatile DAC Register = 0x000 | 4 | |
| Input Current (VREF=VDD) | IDD | 210 | 400 | µA | VREF1:VREF0 = 11, VREF = VDD, SCL = SDA = VSS, VOUT is unloaded, volatile DAC Register = 0x000 | 4 | |
| Power-Down Current | IDDP | 0.09 | 2 | µA | PD1:PD0 = 01 (Note 6), VOUT not connected | 4 | |
| Power-On Reset Threshold | VPOR | 2.2 | V | RAM retention voltage, (VRAM) < VPOR | 4 | ||
| Power-Up Ramp Rate | VRAMP | 1 | V/S | Note 1, Note 4 | 4 | ||
| Offset Error | VOS | 0.02 | 0.75 | % of FSR | Code = 0x000h VREF1:VREF0 = 00, G = 0 | 4 | |
| Offset Error Temperature Coefficient | VOS/°C | 1 | ppm/°C | -40°C to +25°C | 4 | ||
| Offset Error Temperature Coefficient | VOS/°C | 2 | ppm/°C | +25°C to +85°C | 4 | ||
| Zero-Scale Error | EZS | 2.05 | 30.8 | LSb | MCP4726, Code = 0x000h | 4 | |
| Full-Scale Error | EFS | 4.1 | 82 | LSb | MCP4726, Code = 0xFFFh | 4 | |
| Gain Error | gE | -2 | -0.1 | 2 | % of FSR | MCP4726, Code = 0xFFFh VREF1:VREF0 = 00, G = 0 | 4 |
| Gain Error Drift | ΔG/°C | -3 | ppm/°C | 4 | |||
| INL Error | INL | -14.5 | 2 | 14.5 | LSb | MCP4726 (codes: 100 to 4000), VDD = VREF = 5.5V | 4 |
| DNL Error | DNL | -0.75 | 0.2 | 0.75 | LSb | MCP4726 (codes: 100 to 4000), VDD = VREF = 5.5V | 4 |
| Short Circuit Current | ISC | 7 | 15 | 24 | mA | 5 | |
| VREF Input Range (buffered) | VREF | 0.04 | V | Buffered mode; max VDD - 0.04 | 5 | ||
| VREF Input Range (unbuffered) | VREF | 0 | V | Unbuffered mode; max VDD | 5 | ||
| Output Low Voltage | VOL | 0.4 | V | IOL = 3 mA | 6 | ||
| Input High Voltage (SDA, SCL) | VIH | 0.7 | V | 0.7VDD | 6 | ||
| Input Low Voltage (SDA, SCL) | VIL | 0.3 | V | 0.3VDD | 6 | ||
| Input Leakage | ILI | -1 | 1 | µA | SCL = SDA = VSS or SCL = SDA = VDD | 6 | |
| Pin Capacitance | CPIN | 3 | pF | Note 5 | 6 | ||
| EEPROM Write Time | TWRITE | 25 | 50 | ms | 6 | ||
| Endurance | 1 | Million Cycles | At +25°C, (Note 1) | 6 | |||
| Voltage on VDD with respect to VSS | VDD | -0.6 | 6.5 | V | 3 | ||
| Input clamp current | IIK | -20 | 20 | mA | VI < 0, VI > VDD | 3 | |
| Output clamp current | IOK | -20 | 20 | mA | VO < 0 or VO > VDD | 3 | |
| Max current by SDA, SCL pins | 2 | mA | input current source/sunk | 3 | |||
| Max current sunk by SDA output | 25 | mA | 3 | ||||
| Max current out of VSS pin | 50 | mA | 3 | ||||
| Max current into VDD pin | 50 | mA | 3 | ||||
| Max current sourced by VOUT pin | 40 | mA | 3 | ||||
| Max current sunk by VOUT pin | 40 | mA | 3 | ||||
| Max current sunk by VREF pin | 40 | µA | 3 | ||||
| Storage temperature | -65 | 150 | °C | 3 | |||
| Ambient temperature with power applied | -55 | 125 | °C | 3 | |||
| Maximum Junction Temperature | TJ | 150 | °C | 3 | |||
| Specified Temperature Range | TA | -40 | 125 | °C | 13 | ||
| Operating Temperature Range | TA | -40 | 125 | °C | Note 1 | 13 | |
| Thermal Resistance, 6L-SOT-23 | θJA | 190 | °C/W | 13 | |||
| Minimum Output Voltage | VOUT(MIN) | 0.01 | V | Output amplifier's minimum drive | 5 | ||
| Settling Time | tSETTLING | 6 | µs | Note 3 | 5 | ||
| Slew Rate | SR | 0.55 | V/µs | 5 | |||
| Phase Margin | PM | 66 | Degree (°) | CL = 400 pF, RL = ∞ | 5 | ||
| Power-Up Reset Delay | tPORD | 60 | µs | Monitor ACK bit response to ensure device responds to command. | 7 |
CAD (KiCad official)
- Symbol:
MCP4726A1T-E - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
mcp4726a1t-e-etched.step/mcp4726a1t-e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp4726a1t-e.step/mcp4726a1t-e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (86 pp, sha256
f89f3345410b5013, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MCP4726A1T-E
**Microchip Tech** · Digital To Analog Converters (DACs) · SOT-23-6
MCP4726A1T-E from Microchip Tech, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | output | Buffered analog voltage output of the DAC that swings from approximately 0V to approximately VDD, with about 1 Ω DC output impedance in Normal mode and a 1 kΩ, 125 kΩ or 640 kΩ pull-down in Power-Down mode. |
| 2 | VSS | power_in | Ground reference for all circuitry on the device, to be connected to a ground plane (preferably analog ground) through a low-impedance connection. |
| 3 | VDD | power_in | Positive supply input (2.7V to 5.5V) relative to VSS, to be bypassed with about 0.1 µF ceramic in parallel with 10 µF tantalum placed within 4 mm of the pin. |
| 4 | SDA | bidirectional | I2C serial data pin with an open-drain N-channel driver that needs a pull-up resistor to VDD, and data must be stable while SCL is high except for Start and Stop conditions. |
| 5 | SCL | input | I2C serial clock input (open-drain, slave-only device accepting only external clocks) that needs a pull-up resistor to VDD, supporting 100 kHz, 400 kHz and 3.4 MHz modes. |
| 6 | VREF | power_in | External voltage reference input selectable as the DAC reference (buffered or unbuffered, with gain 1x or 2x limited to VDD/2 maximum at 2x), and disconnected from the internal circuit when VDD is selected as reference. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOT-23-6 |
| Category | ADC/DAC/Data Conversion |
| Pins | 6 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VDD | 2.7 | | 5.5 | V | | 4 |
| Input Current | IDD | | 210 | 400 | µA | VREF1:VREF0 = 00, SCL = SDA = VSS, VOUT is unloaded, volatile DAC Register = 0x000 | 4 |
| Input Current (VREF=VDD) | IDD | | 210 | 400 | µA | VREF1:VREF0 = 11, VREF = VDD, SCL = SDA = VSS, VOUT is unloaded, volatile DAC Register = 0x000 | 4 |
| Power-Down Current | IDDP | | 0.09 | 2 | µA | PD1:PD0 = 01 (Note 6), VOUT not connected | 4 |
| Power-On Reset Threshold | VPOR | | 2.2 | | V | RAM retention voltage, (VRAM) < VPOR | 4 |
| Power-Up Ramp Rate | VRAMP | 1 | | | V/S | Note 1, Note 4 | 4 |
| Offset Error | VOS | | 0.02 | 0.75 | % of FSR | Code = 0x000h VREF1:VREF0 = 00, G = 0 | 4 |
| Offset Error Temperature Coefficient | VOS/°C | | 1 | | ppm/°C | -40°C to +25°C | 4 |
| Offset Error Temperature Coefficient | VOS/°C | | 2 | | ppm/°C | +25°C to +85°C | 4 |
| Zero-Scale Error | EZS | | 2.05 | 30.8 | LSb | MCP4726, Code = 0x000h | 4 |
| Full-Scale Error | EFS | | 4.1 | 82 | LSb | MCP4726, Code = 0xFFFh | 4 |
| Gain Error | gE | -2 | -0.1 | 2 | % of FSR | MCP4726, Code = 0xFFFh VREF1:VREF0 = 00, G = 0 | 4 |
| Gain Error Drift | ΔG/°C | | -3 | | ppm/°C | | 4 |
| INL Error | INL | -14.5 | 2 | 14.5 | LSb | MCP4726 (codes: 100 to 4000), VDD = VREF = 5.5V | 4 |
| DNL Error | DNL | -0.75 | 0.2 | 0.75 | LSb | MCP4726 (codes: 100 to 4000), VDD = VREF = 5.5V | 4 |
| Short Circuit Current | ISC | 7 | 15 | 24 | mA | | 5 |
| VREF Input Range (buffered) | VREF | 0.04 | | | V | Buffered mode; max VDD - 0.04 | 5 |
| VREF Input Range (unbuffered) | VREF | 0 | | | V | Unbuffered mode; max VDD | 5 |
| Output Low Voltage | VOL | | | 0.4 | V | IOL = 3 mA | 6 |
| Input High Voltage (SDA, SCL) | VIH | 0.7 | | | V | 0.7VDD | 6 |
| Input Low Voltage (SDA, SCL) | VIL | | | 0.3 | V | 0.3VDD | 6 |
| Input Leakage | ILI | -1 | | 1 | µA | SCL = SDA = VSS or SCL = SDA = VDD | 6 |
| Pin Capacitance | CPIN | | | 3 | pF | Note 5 | 6 |
| EEPROM Write Time | TWRITE | | 25 | 50 | ms | | 6 |
| Endurance | | 1 | | | Million Cycles | At +25°C, (Note 1) | 6 |
| Voltage on VDD with respect to VSS | VDD | -0.6 | | 6.5 | V | | 3 |
| Input clamp current | IIK | -20 | | 20 | mA | VI < 0, VI > VDD | 3 |
| Output clamp current | IOK | -20 | | 20 | mA | VO < 0 or VO > VDD | 3 |
| Max current by SDA, SCL pins | | | | 2 | mA | input current source/sunk | 3 |
| Max current sunk by SDA output | | | | 25 | mA | | 3 |
| Max current out of VSS pin | | | | 50 | mA | | 3 |
| Max current into VDD pin | | | | 50 | mA | | 3 |
| Max current sourced by VOUT pin | | | | 40 | mA | | 3 |
| Max current sunk by VOUT pin | | | | 40 | mA | | 3 |
| Max current sunk by VREF pin | | | | 40 | µA | | 3 |
| Storage temperature | | -65 | | 150 | °C | | 3 |
| Ambient temperature with power applied | | -55 | | 125 | °C | | 3 |
| Maximum Junction Temperature | TJ | | | 150 | °C | | 3 |
| Specified Temperature Range | TA | -40 | | 125 | °C | | 13 |
| Operating Temperature Range | TA | -40 | | 125 | °C | Note 1 | 13 |
| Thermal Resistance, 6L-SOT-23 | θJA | | 190 | | °C/W | | 13 |
| Minimum Output Voltage | VOUT(MIN) | | 0.01 | | V | Output amplifier's minimum drive | 5 |
| Settling Time | tSETTLING | | 6 | | µs | Note 3 | 5 |
| Slew Rate | SR | | 0.55 | | V/µs | | 5 |
| Phase Margin | PM | | 66 | | Degree (°) | CL = 400 pF, RL = ∞ | 5 |
| Power-Up Reset Delay | tPORD | | 60 | | µs | Monitor ACK bit response to ensure device responds to command. | 7 |
## CAD (KiCad official)
- Symbol: `MCP4726A1T-E`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files: `mcp4726a1t-e-etched.step` / `mcp4726a1t-e-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mcp4726a1t-e.step` / `mcp4726a1t-e.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](docs/mcp4726a1t-e-datasheet.pdf) (86 pp, sha256 `f89f3345410b5013`, retrieved 2026-10-27, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mcp4726a1t-e-datasheet.pdf)