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MCP4661T-503E
Public Made by Adomby adom
Microchip Tech Digital Potentiometers, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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MCP4661T-503E
Microchip Tech · Digital Potentiometers · TSSOP-14
MCP4661T-503E from Microchip Tech, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | HVC/A0 | input | Address 0 input latched at POR/BOR for the I2C address, and the High Voltage command pin (a VIHH level selects a High Voltage command); digital inputs are high-voltage tolerant up to 12.5V. |
| 2 | SCL | input | I2C serial clock input that accepts only external clock signals from the host controller, with high-voltage tolerant Schmitt-trigger input up to 12.5V. |
| 3 | SDA | bidirectional | I2C serial data pin, an open-drain N-channel driver connected to the host controller SDA. |
| 4 | VSS | power_in | Device ground reference; all voltages on the device pins are referenced to VSS. |
| 5 | P1B | passive | Potentiometer 1 terminal B, fixed connection to the zero-scale wiper value (0x00); its voltage must be between VSS and VDD. |
| 6 | P1W | passive | Potentiometer 1 wiper terminal, which can carry positive and negative current; its voltage must be between VSS and VDD. |
| 7 | P1A | passive | Potentiometer 1 terminal A, fixed connection to the full-scale wiper value (0x100 for 8-bit devices); its voltage must be between VSS and VDD. |
| 8 | P0A | passive | Potentiometer 0 terminal A, fixed connection to the full-scale wiper value (0x100 for 8-bit devices); its voltage must be between VSS and VDD. |
| 9 | P0W | passive | Potentiometer 0 wiper terminal, which can carry positive and negative current; its voltage must be between VSS and VDD. |
| 10 | P0B | passive | Potentiometer 0 terminal B, fixed connection to the zero-scale wiper value (0x00); its voltage must be between VSS and VDD. |
| 11 | NC | unconnected | No connection; the datasheet states this pin should be connected to VDD or VSS. |
| 12 | A2 | input | I2C Address 2 input which, with A1 and A0, selects one of up to eight devices on a single I2C bus; high-voltage tolerant input. |
| 13 | A1 | input | I2C Address 1 input which, with A2 and A0, selects one of up to eight devices on a single I2C bus; high-voltage tolerant input. |
| 14 | VDD | power_in | Positive power supply input relative to VSS; device characteristics are specified for 2.7V to 5.5V, and performance may not meet the data sheet specifications below 2.7V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TSSOP-14 |
| Category | ADC/DAC/Data Conversion |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VDD | 2.7 | 5.5 | V | 4 | ||
| Operating Temperature Range | TA | -40 | 125 | °C | 16 | ||
| Nominal Resistance (-503 device) | RAB | 40 | 50 | 60 | kΩ | -503 devices (Note 1) | 5 |
| Nominal Resistance Tolerance | RAB | -20 | 20 | % | Printed ±20%, -503 devices (Note 1) | 5 | |
| Nominal Resistance Match (MCP46X1) | /RAB0-RAB1//RAB | 0.2 | 1.25 | % | MCP46X1 devices only | 5 | |
| Wiper Resistance (5.5V) | RW | 75 | 160 | Ω | VDD = 5.5 V, IW = 2.0 mA, code = 00h | 5 | |
| Wiper Resistance (2.7V) | RW | 75 | 300 | Ω | VDD = 2.7 V, IW = 2.0 mA, code = 00h | 5 | |
| Maximum current through Terminal A | IT | 2.5 | mA | Terminal A IAW, W = Full-Scale (FS) | 6 | ||
| Maximum current through Terminal B | IT | 2.5 | mA | Terminal B IBW, W = Zero Scale (ZS) | 6 | ||
| Maximum current through Terminal W | IT | 2.5 | mA | Terminal W IAW or IBW, W = FS or ZS | 6 | ||
| Maximum current Terminal A to B (RAB(MIN) = 40000) | IAB | 0.138 | mA | IAB, VB = 0V, VA = 5.5V, RAB(MIN) = 40000 | 6 | ||
| Full-Scale Error (50 k, 8-bit) | VWFSE | -0.8 | -0.1 | LSb | 8-bit code = 100h, 50 k, 3.0V ≤ VDD ≤ 5.5V (MCP4XX1 only) | 7 | |
| Zero-Scale Error (50 k, 8-bit) | VWZSE | 0.1 | 0.8 | LSb | 8-bit code = 00h, 50 k, 3.0V ≤ VDD ≤ 5.5V (MCP4XX1 only) | 7 | |
| Potentiometer Integral Non-linearity (8-bit) | INL | -1 | 0.5 | 1 | LSb | 8-bit, 3.0V ≤ VDD ≤ 5.5V (MCP4XX1 only, Note 2) | 7 |
| Potentiometer Differential Non-linearity (8-bit) | DNL | -0.5 | 0.25 | 0.5 | LSb | 8-bit, 3.0V ≤ VDD ≤ 5.5V (MCP4XX1 only, Note 2) | 7 |
| Rheostat Integral Non-linearity (50 k, 8-bit, 5.5V) | R-INL | -1.5 | 0.5 | 1.5 | LSb | 50 k, 8-bit, 5.5V, IW = 90 µA | 9 |
| Rheostat Integral Non-linearity (50 k, 8-bit, 3.0V) | R-INL | -2 | 1 | 2 | LSb | 50 k, 8-bit, 3.0V, IW = 48 µA (Note 7) | 9 |
| Rheostat Differential Non-linearity (50 k, 8-bit, 5.5V) | R-DNL | -0.5 | 0.25 | 0.5 | LSb | 50 k, 8-bit, 5.5V, IW = 90 µA | 10 |
| Rheostat Differential Non-linearity (50 k, 8-bit, 3.0V) | R-DNL | -0.5 | 0.25 | 0.5 | LSb | 50 k, 8-bit, 3.0V, IW = 48 µA (Note 7) | 10 |
| Schmitt Trigger High Input Threshold | VIH | 0.45 | VDD | 2.7V ≤ VDD ≤ 5.5V; all inputs except SDA and SCL | 11 | ||
| Schmitt Trigger High Input Threshold (SDA, SCL 100 kHz) | VIH | 0.7 | VDD | SDA and SCL, 100 kHz mode; max = VMAX | 11 | ||
| Schmitt Trigger Low Input Threshold | VIL | 0.2 | VDD | All inputs except SDA and SCL | 11 | ||
| Schmitt Trigger Low Input Threshold (SDA, SCL 100 kHz) | VIL | -0.5 | 0.3 | VDD | SDA and SCL, 100 kHz mode | 11 | |
| Hysteresis of Schmitt Trigger Inputs (SDA, SCL 1.7 MHz) | VHYS | 0.1 | VDD | SDA and SCL, 1.7 MHz mode | 11 | ||
| High Voltage Limit | VMAX | 12.5 | V | Pin can tolerate VMAX or less | 11 | ||
| Output Low Voltage (SDA) | VOL | 0.4 | V | VDD ≥ 2.0V, IOL = 3 mA | 12 | ||
| Weak Pull-up / Pull-down Current | IPU | 1.75 | mA | Internal VDD pull-up, VIHH pull-down; VDD = 5.5V, VIHH = 12.5V | 12 | ||
| Input Leakage Current | IIL | -1 | 1 | µA | VIN = VDD and VIN = VSS | 12 | |
| Supply Current (serial active, 3.4 MHz) | IDD | 600 | µA | Serial interface active, HVC/A0 = VIH or VIL; write all 0's to volatile wiper 0; VDD = 5.5V, FSCL = 3.4 MHz | 4 | ||
| Supply Current (serial active, 100 kHz) | IDD | 250 | µA | Serial interface active, HVC/A0 = VIH or VIL; write all 0's to volatile wiper 0; VDD = 5.5V, FSCL = 100 kHz | 4 | ||
| Supply Current (serial inactive) | IDD | 2.5 | 5 | µA | Serial interface inactive (stop condition, SCL = SDA = VIH), wiper = 0; VDD = 5.5V, HVC/A0 = VIH | 4 | |
| HVC Pin Voltage Range | VHV | 12.5 | V | VDD ≥ 4.5V | 4 | ||
| VDD Start Voltage to ensure Wiper Reset | VBOR | 1.65 | V | RAM retention voltage (VRAM) < VBOR | 4 | ||
| Delay after device exits reset state | TBORD | 10 | 20 | µs | VDD > VBOR | 4 | |
| Absolute maximum: Voltage on VDD | VDD | -0.6 | 7 | V | With respect to VSS | 3 | |
| Absolute maximum: Voltage on HVC/A0, A1, A2, SCL, SDA | -0.6 | 12.5 | V | With respect to VSS | 3 | ||
| Absolute maximum: Voltage on PxA, PxW, PxB | -0.3 | V | With respect to VSS; upper limit VDD + 0.3V | 3 | |||
| Input clamp current | IIK | -20 | 20 | mA | VI < 0, VI > VDD, VI > VPP on HV pins | 3 | |
| Output clamp current | IOK | -20 | 20 | mA | VO < 0 or VO > VDD | 3 | |
| Maximum output current sunk by any output pin | 25 | mA | 3 | ||||
| Maximum output current sourced by any output pin | 25 | mA | 3 | ||||
| Maximum current out of VSS pin | 100 | mA | 3 | ||||
| Maximum current into VDD pin | 100 | mA | 3 | ||||
| Maximum current into PxA, PxW, PxB pins | -2.5 | 2.5 | mA | 3 | |||
| Storage temperature | -65 | 150 | °C | 3 | |||
| Ambient temperature with power applied | -40 | 125 | °C | 3 | |||
| Package power dissipation, TSSOP-14 | 1 | W | TA = +50°C, TJ = +150°C | 3 | |||
| Soldering temperature of leads | 300 | °C | 10 seconds | 3 | |||
| Maximum junction temperature | TJ | 150 | °C | 3 | |||
| SCL clock frequency, Standard mode | FSCL | 0 | 100 | kHz | Cb = 400 pF, 1.8V - 5.5V | 13 | |
| SCL clock frequency, Fast mode | FSCL | 0 | 400 | kHz | Cb = 400 pF, 2.7V - 5.5V | 13 | |
| SCL clock frequency, High-Speed 1.7 MHz | FSCL | 0 | 1.7 | MHz | Cb = 400 pF, 4.5V - 5.5V | 13 | |
| SCL clock frequency, High-Speed 3.4 MHz | FSCL | 0 | 3.4 | MHz | Cb = 100 pF, 4.5V - 5.5V | 13 | |
| Clock low time (400 kHz mode) | TLOW | 1300 | ns | 400 kHz mode, 2.7V-5.5V | 14 | ||
| Output valid from clock (400 kHz mode) | TAA | 900 | ns | 400 kHz mode, Note 1 | 15 | ||
| Nominal Resistance Tempco (-20°C to +70°C) | RAB/T | 50 | ppm/°C | TA = -20°C to +70°C | 5 | ||
| Nominal Resistance Tempco (-40°C to +85°C) | RAB/T | 100 | ppm/°C | TA = -40°C to +85°C | 5 | ||
| Nominal Resistance Tempco (-40°C to +125°C) | RAB/T | 150 | ppm/°C | TA = -40°C to +125°C | 5 | ||
| Ratiometric Tempco | VWB/T | 15 | ppm/°C | Code = Midscale (80h or 40h) | 5 |
CAD (KiCad official)
- Symbol:
MCP4661T-503E - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
mcp4661t-503e-etched.step/mcp4661t-503e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp4661t-503e.step/mcp4661t-503e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (102 pp, sha256
ee77464c39584a73, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).