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Contents

README

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MCP4652T-502E

Microchip Tech · Digital Potentiometers · DFN-10-EP(3x3)

MCP4652T-502E from Microchip Tech, in a DFN-10-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 HVC/A0 input High-voltage command / address bit 0 input with internal 'smart' VDD pull-up; state is latched at POR/BOR; tolerates up to 12.5 V (VIHH) to enable high-voltage serial commands; VIH ≥ 0.45 VDD for VDD 2.7-5.5 V.
2 SCL input I2C serial clock input, slave-only (no clock stretching); supports standard (100 kHz), fast (400 kHz), and high-speed (3.4 MHz) modes; VIH ≥ 0.7 VDD.
3 SDA bidirectional I2C serial data open-drain N-channel I/O; SDA must be stable while SCL is HIGH; VOL ≤ 0.4 V at IOL = 3 mA (VDD ≥ 2.0 V).
4 VSS power_in Ground reference; maximum current out of VSS pin is 100 mA.
5 P1B passive Resistor network 1 Terminal B (zero-scale end); voltage range VSS to VDD; maximum terminal current ±2.5 mA; disconnectable via TCON register bit R1B.
6 P1W passive Resistor network 1 wiper (adjustable terminal); wiper resistance typically 75 Ω (max 160 Ω) at VDD = 5.5 V, IW = 2.0 mA, code = 00h; voltage range VSS to VDD.
7 P0W passive Resistor network 0 wiper (adjustable terminal); wiper resistance typically 75 Ω (max 160 Ω) at VDD = 5.5 V, IW = 2.0 mA, code = 00h; voltage range VSS to VDD.
8 P0B passive Resistor network 0 Terminal B (zero-scale end); voltage range VSS to VDD; maximum terminal current ±2.5 mA; disconnectable via TCON register bit R0B.
9 A1 input I2C address bit 1 input with internal 'smart' pull-up; must be tied statically to VDD or VSS; VIH ≥ 0.45 VDD; supports up to 4 MCP46X2 devices on one I2C bus together with A0.
10 VDD power_in Positive power supply input; 2.7 V to 5.5 V for full electrical specifications, 1.8 V to 5.5 V for serial interface operation only; decouple with 0.1 µF to VSS placed within 4 mm of pin.
11 EP passive Exposed thermal pad on bottom of package, conductively connected to die substrate; must be left unconnected or tied to the same potential as VSS; may be used as PCB heat sink connection.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package DFN-10-EP(3x3)
Category Data Acquisition
Pins 11

CAD (KiCad official)

  • Symbol: MCP4652T-502E
  • Footprint: Package_DFN_QFN:DFN-10-1EP_3x3mm_P0.5mm_EP1.55x2.48mm
  • 3D model: DFN-10-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: mcp4652t-502e-etched.step / mcp4652t-502e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp4652t-502e.step / mcp4652t-502e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (102 pp, sha256 ee77464c39584a73, retrieved 2026-09-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF