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MCP4652-503E
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Microchip Tech Digital Potentiometers, MSOP-10. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MCP4652-503E
Microchip Tech · Digital Potentiometers · MSOP-10
MCP4652-503E from Microchip Tech, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | HVC/A0 | input | Address 0 input for the I2C interface, latched at POR/BOR, which also acts as the High Voltage command pin when HVC/A0 = VIHH. |
| 2 | SCL | input | I2C serial clock input; the device is a slave that accepts only external clock signals. |
| 3 | SDA | bidirectional | I2C serial data I/O pin implemented as an open-drain N-channel driver. |
| 4 | VSS | power_in | Device ground reference. |
| 5 | P1B | passive | Potentiometer 1 terminal B, fixed connection to the zero-scale wiper value 0x00, with voltage limited between VSS and VDD. |
| 6 | P1W | passive | Potentiometer 1 wiper terminal, which may carry positive and negative current with voltage limited between VSS and VDD. |
| 7 | P0W | passive | Potentiometer 0 wiper terminal, which may carry positive and negative current with voltage limited between VSS and VDD. |
| 8 | P0B | passive | Potentiometer 0 terminal B, fixed connection to the zero-scale wiper value 0x00, with voltage limited between VSS and VDD. |
| 9 | A1 | input | I2C Address 1 pin which, together with A2 and A0, allows up to eight devices on one I2C bus. |
| 10 | VDD | power_in | Positive power supply input relative to VSS; electrical performance may not meet data sheet specifications while VDD is below 2.7V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | MSOP-10 |
| Category | ADC/DAC/Data Conversion |
| Pins | 10 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VDD | 2.7 | 5.5 | V | 4 | ||
| Supply Voltage (serial interface only) | VDD | 1.8 | 2.7 | V | Serial Interface only. | 4 | |
| HVC pin Voltage Range | VHV | 12.5 | V | VDD >= 4.5V | 4 | ||
| VDD Start Voltage to ensure Wiper Reset | VBOR | 1.65 | V | RAM retention voltage (VRAM) < VBOR | 4 | ||
| Delay after device exits the reset state (VDD > VBOR) | TBORD | 10 | 20 | µs | 4 | ||
| Supply Current, serial interface active (3.4 MHz) | IDD | 600 | µA | Serial Interface Active, HVC/A0 = VIH (or VIL); Write all 0's to Volatile Wiper 0; VDD = 5.5V, FSCL = 3.4 MHz | 4 | ||
| Supply Current, serial interface active (100 kHz) | IDD | 250 | µA | Serial Interface Active, HVC/A0 = VIH (or VIL); Write all 0's to Volatile Wiper 0; VDD = 5.5V, FSCL = 100 kHz | 4 | ||
| Supply Current, serial interface inactive | IDD | 2.5 | 5 | µA | Serial Interface Inactive, (Stop condition, SCL = SDA = VIH), Wiper = 0; VDD = 5.5V, HVC/A0 = VIH | 4 | |
| Resistance tolerance | RAB | -20 | 20 | % | 5 | ||
| Nominal Resistance (50 k device) | RAB | 40 | 50 | 60 | k | -503 devices (Note 1) | 5 |
| Wiper Resistance | RW | 75 | 160 | ohms | VDD = 5.5 V, IW = 2.0 mA, code = 00h | 5 | |
| Wiper Resistance | RW | 75 | 300 | ohms | VDD = 2.7 V, IW = 2.0 mA, code = 00h | 5 | |
| Rheostat Integral Non-linearity | R-INL | -1.5 | 1.5 | LSb | 50 k 8-bit 5.5V, IW = 90 µA | 9 | |
| Rheostat Integral Non-linearity | R-INL | -2 | 1 | 2 | LSb | 50 k 8-bit 3.0V, IW = 48 µA | 9 |
| Rheostat Differential Non-linearity | R-DNL | -0.5 | 0.5 | LSb | 50 k 8-bit 5.5V, IW = 90 µA | 10 | |
| Maximum current through Terminal A or W (W = Full-Scale) | IT | 2.5 | mA | Terminal A IAW, W = Full-Scale (FS) | 6 | ||
| Maximum current through Terminal B | IT | 2.5 | mA | Terminal B IBW, W = Zero Scale (ZS) | 6 | ||
| Maximum current through Terminal W | IT | 2.5 | mA | Terminal W IAW or IBW, W = FS or ZS | 6 | ||
| Maximum current through Terminal A and B (50 k) | IT | 0.138 | mA | IAB, VB = 0V, VA = 5.5V, RAB(MIN) = 40000 | 6 | ||
| Input Leakage Current | IIL | -1 | 1 | µA | VIN = VDD and VIN = VSS | 12 | |
| High Voltage Limit | VMAX | 12.5 | V | Pin can tolerate VMAX or less. | 11 | ||
| Output Low Voltage (SDA) | VOL | 0.4 | V | VDD >= 2.0V, IOL = 3 mA | 12 | ||
| Weak Pull-up / Pull-down Current | IPU | 1.75 | mA | Internal VDD pull-up, VIHH pull-down; VDD = 5.5V, VIHH = 12.5V | 12 | ||
| Power Supply Sensitivity (MCP46X2) | PSS | 0.0015 | 0.0035 | %/% | 8-bit VDD = 2.7V to 5.5V, VA = 2.7V, Code = 80h | 12 | |
| I2C clock frequency, standard mode | FSCL | 0 | 100 | kHz | Standard Mode; Cb = 400 pF, 1.8V - 5.5V | 13 | |
| I2C clock frequency, fast mode | FSCL | 0 | 400 | kHz | Fast Mode; Cb = 400 pF, 2.7V - 5.5V | 13 | |
| I2C clock frequency, high-speed 1.7 | FSCL | 0 | 1.7 | MHz | High-Speed 1.7; Cb = 400 pF, 4.5V - 5.5V | 13 | |
| I2C clock frequency, high-speed 3.4 | FSCL | 0 | 3.4 | MHz | High-Speed 3.4; Cb = 100 pF, 4.5V - 5.5V | 13 | |
| Voltage on VDD with respect to VSS | VDD | -0.6 | 7 | V | with respect to VSS | 3 | |
| Voltage on HVC/A0, A1, A2, SCL, and SDA with respect to VSS | -0.6 | 12.5 | V | with respect to VSS | 3 | ||
| Input clamp current | IIK | -20 | 20 | mA | VI < 0, VI > VDD, VI > VPP ON HV pins | 3 | |
| Output clamp current | IOK | -20 | 20 | mA | VO < 0 or VO > VDD | 3 | |
| Maximum output current sunk by any Output pin | 25 | mA | 3 | ||||
| Maximum output current sourced by any Output pin | 25 | mA | 3 | ||||
| Maximum current out of VSS pin | 100 | mA | 3 | ||||
| Maximum current into VDD pin | 100 | mA | 3 | ||||
| Maximum current into PXA, PXW and PXB pins | -2.5 | 2.5 | mA | 3 | |||
| Storage temperature | -65 | 150 | °C | 3 | |||
| Ambient temperature with power applied | -40 | 125 | °C | 3 | |||
| Soldering temperature of leads | 300 | °C | 10 seconds | 3 | |||
| Maximum Junction Temperature | TJ | 150 | °C | 3 | |||
| Specified Temperature Range | TA | -40 | 125 | °C | 16 | ||
| Operating Temperature Range | TA | -40 | 125 | °C | 16 | ||
| Nominal Resistance Tempco | RAB/T | 50 | ppm/°C | TA = -20°C to +70°C | 5 | ||
| Nominal Resistance Tempco | RAB/T | 100 | ppm/°C | TA = -40°C to +85°C | 5 | ||
| Nominal Resistance Tempco | RAB/T | 150 | ppm/°C | TA = -40°C to +125°C | 5 | ||
| Ratiometric Tempco | VWB/T | 15 | ppm/°C | Code = Midscale (80h or 40h) | 5 | ||
| Nominal Resistance Match (MCP46X2) | RBW | 0.25 | 1.5 | % | MCP46X2 devices only, Code = Full-Scale | 5 | |
| Thermal Resistance, 10L-MSOP | θJA | 202 | °C/W | 16 |
CAD (KiCad official)
- Symbol:
MCP4652-503E - Footprint:
Package_SO:MSOP-10_3x3mm_P0.5mm - 3D model: MSOP-10 (KiCad packages3D, STEP)
- 3D model files:
mcp4652-503e-etched.step/mcp4652-503e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp4652-503e.step/mcp4652-503e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (102 pp, sha256
ee77464c39584a73, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MCP4652-503E
**Microchip Tech** · Digital Potentiometers · MSOP-10
MCP4652-503E from Microchip Tech, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | HVC/A0 | input | Address 0 input for the I2C interface, latched at POR/BOR, which also acts as the High Voltage command pin when HVC/A0 = VIHH. |
| 2 | SCL | input | I2C serial clock input; the device is a slave that accepts only external clock signals. |
| 3 | SDA | bidirectional | I2C serial data I/O pin implemented as an open-drain N-channel driver. |
| 4 | VSS | power_in | Device ground reference. |
| 5 | P1B | passive | Potentiometer 1 terminal B, fixed connection to the zero-scale wiper value 0x00, with voltage limited between VSS and VDD. |
| 6 | P1W | passive | Potentiometer 1 wiper terminal, which may carry positive and negative current with voltage limited between VSS and VDD. |
| 7 | P0W | passive | Potentiometer 0 wiper terminal, which may carry positive and negative current with voltage limited between VSS and VDD. |
| 8 | P0B | passive | Potentiometer 0 terminal B, fixed connection to the zero-scale wiper value 0x00, with voltage limited between VSS and VDD. |
| 9 | A1 | input | I2C Address 1 pin which, together with A2 and A0, allows up to eight devices on one I2C bus. |
| 10 | VDD | power_in | Positive power supply input relative to VSS; electrical performance may not meet data sheet specifications while VDD is below 2.7V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | MSOP-10 |
| Category | ADC/DAC/Data Conversion |
| Pins | 10 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VDD | 2.7 | | 5.5 | V | | 4 |
| Supply Voltage (serial interface only) | VDD | 1.8 | | 2.7 | V | Serial Interface only. | 4 |
| HVC pin Voltage Range | VHV | | | 12.5 | V | VDD >= 4.5V | 4 |
| VDD Start Voltage to ensure Wiper Reset | VBOR | | | 1.65 | V | RAM retention voltage (VRAM) < VBOR | 4 |
| Delay after device exits the reset state (VDD > VBOR) | TBORD | | 10 | 20 | µs | | 4 |
| Supply Current, serial interface active (3.4 MHz) | IDD | | | 600 | µA | Serial Interface Active, HVC/A0 = VIH (or VIL); Write all 0's to Volatile Wiper 0; VDD = 5.5V, FSCL = 3.4 MHz | 4 |
| Supply Current, serial interface active (100 kHz) | IDD | | | 250 | µA | Serial Interface Active, HVC/A0 = VIH (or VIL); Write all 0's to Volatile Wiper 0; VDD = 5.5V, FSCL = 100 kHz | 4 |
| Supply Current, serial interface inactive | IDD | | 2.5 | 5 | µA | Serial Interface Inactive, (Stop condition, SCL = SDA = VIH), Wiper = 0; VDD = 5.5V, HVC/A0 = VIH | 4 |
| Resistance tolerance | RAB | -20 | | 20 | % | | 5 |
| Nominal Resistance (50 k device) | RAB | 40 | 50 | 60 | k | -503 devices (Note 1) | 5 |
| Wiper Resistance | RW | | 75 | 160 | ohms | VDD = 5.5 V, IW = 2.0 mA, code = 00h | 5 |
| Wiper Resistance | RW | | 75 | 300 | ohms | VDD = 2.7 V, IW = 2.0 mA, code = 00h | 5 |
| Rheostat Integral Non-linearity | R-INL | -1.5 | | 1.5 | LSb | 50 k 8-bit 5.5V, IW = 90 µA | 9 |
| Rheostat Integral Non-linearity | R-INL | -2 | 1 | 2 | LSb | 50 k 8-bit 3.0V, IW = 48 µA | 9 |
| Rheostat Differential Non-linearity | R-DNL | -0.5 | | 0.5 | LSb | 50 k 8-bit 5.5V, IW = 90 µA | 10 |
| Maximum current through Terminal A or W (W = Full-Scale) | IT | | | 2.5 | mA | Terminal A IAW, W = Full-Scale (FS) | 6 |
| Maximum current through Terminal B | IT | | | 2.5 | mA | Terminal B IBW, W = Zero Scale (ZS) | 6 |
| Maximum current through Terminal W | IT | | | 2.5 | mA | Terminal W IAW or IBW, W = FS or ZS | 6 |
| Maximum current through Terminal A and B (50 k) | IT | | | 0.138 | mA | IAB, VB = 0V, VA = 5.5V, RAB(MIN) = 40000 | 6 |
| Input Leakage Current | IIL | -1 | | 1 | µA | VIN = VDD and VIN = VSS | 12 |
| High Voltage Limit | VMAX | | | 12.5 | V | Pin can tolerate VMAX or less. | 11 |
| Output Low Voltage (SDA) | VOL | | | 0.4 | V | VDD >= 2.0V, IOL = 3 mA | 12 |
| Weak Pull-up / Pull-down Current | IPU | | | 1.75 | mA | Internal VDD pull-up, VIHH pull-down; VDD = 5.5V, VIHH = 12.5V | 12 |
| Power Supply Sensitivity (MCP46X2) | PSS | | 0.0015 | 0.0035 | %/% | 8-bit VDD = 2.7V to 5.5V, VA = 2.7V, Code = 80h | 12 |
| I2C clock frequency, standard mode | FSCL | 0 | | 100 | kHz | Standard Mode; Cb = 400 pF, 1.8V - 5.5V | 13 |
| I2C clock frequency, fast mode | FSCL | 0 | | 400 | kHz | Fast Mode; Cb = 400 pF, 2.7V - 5.5V | 13 |
| I2C clock frequency, high-speed 1.7 | FSCL | 0 | | 1.7 | MHz | High-Speed 1.7; Cb = 400 pF, 4.5V - 5.5V | 13 |
| I2C clock frequency, high-speed 3.4 | FSCL | 0 | | 3.4 | MHz | High-Speed 3.4; Cb = 100 pF, 4.5V - 5.5V | 13 |
| Voltage on VDD with respect to VSS | VDD | -0.6 | | 7 | V | with respect to VSS | 3 |
| Voltage on HVC/A0, A1, A2, SCL, and SDA with respect to VSS | | -0.6 | | 12.5 | V | with respect to VSS | 3 |
| Input clamp current | IIK | -20 | | 20 | mA | VI < 0, VI > VDD, VI > VPP ON HV pins | 3 |
| Output clamp current | IOK | -20 | | 20 | mA | VO < 0 or VO > VDD | 3 |
| Maximum output current sunk by any Output pin | | | | 25 | mA | | 3 |
| Maximum output current sourced by any Output pin | | | | 25 | mA | | 3 |
| Maximum current out of VSS pin | | | | 100 | mA | | 3 |
| Maximum current into VDD pin | | | | 100 | mA | | 3 |
| Maximum current into PXA, PXW and PXB pins | | -2.5 | | 2.5 | mA | | 3 |
| Storage temperature | | -65 | | 150 | °C | | 3 |
| Ambient temperature with power applied | | -40 | | 125 | °C | | 3 |
| Soldering temperature of leads | | | | 300 | °C | 10 seconds | 3 |
| Maximum Junction Temperature | TJ | | | 150 | °C | | 3 |
| Specified Temperature Range | TA | -40 | | 125 | °C | | 16 |
| Operating Temperature Range | TA | -40 | | 125 | °C | | 16 |
| Nominal Resistance Tempco | RAB/T | | 50 | | ppm/°C | TA = -20°C to +70°C | 5 |
| Nominal Resistance Tempco | RAB/T | | 100 | | ppm/°C | TA = -40°C to +85°C | 5 |
| Nominal Resistance Tempco | RAB/T | | 150 | | ppm/°C | TA = -40°C to +125°C | 5 |
| Ratiometric Tempco | VWB/T | | 15 | | ppm/°C | Code = Midscale (80h or 40h) | 5 |
| Nominal Resistance Match (MCP46X2) | RBW | | 0.25 | 1.5 | % | MCP46X2 devices only, Code = Full-Scale | 5 |
| Thermal Resistance, 10L-MSOP | θJA | | 202 | | °C/W | | 16 |
## CAD (KiCad official)
- Symbol: `MCP4652-503E`
- Footprint: `Package_SO:MSOP-10_3x3mm_P0.5mm`
- 3D model: MSOP-10 (KiCad packages3D, STEP)
- 3D model files: `mcp4652-503e-etched.step` / `mcp4652-503e-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mcp4652-503e.step` / `mcp4652-503e.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](docs/mcp4652-503e-datasheet.pdf) (102 pp, sha256 `ee77464c39584a73`, retrieved 2026-10-28, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mcp4652-503e-datasheet.pdf)