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MCP4641-502E

Public Made by Adom

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Microchip Tech Digital Potentiometers, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MCP4641-502E

Microchip Tech · Digital Potentiometers · TSSOP-14

MCP4641-502E from Microchip Tech, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 HVC/A0 input High-voltage tolerant Schmitt-trigger input that latches the A0 address bit at POR/BOR and selects a High Voltage command when driven to VIHH.
2 SCL input I2C serial clock input that accepts only external clock signals as a slave device, with high-voltage tolerant Schmitt-trigger input.
3 SDA bidirectional I2C serial data pin implemented as an open-drain N-channel driver, with high-voltage tolerant Schmitt-trigger input.
4 VSS power_in Device ground reference for the device.
5 P1B passive Potentiometer 1 terminal B, which must be between VSS and VDD and can carry both positive and negative current.
6 P1W passive Potentiometer 1 wiper terminal, which must be between VSS and VDD and can carry both positive and negative current.
7 P1A passive Potentiometer 1 terminal A, which must be between VSS and VDD and can carry both positive and negative current.
8 P0A passive Potentiometer 0 terminal A, which must be between VSS and VDD and can carry both positive and negative current.
9 P0W passive Potentiometer 0 wiper terminal, which must be between VSS and VDD and can carry both positive and negative current.
10 P0B passive Potentiometer 0 terminal B, which must be between VSS and VDD and can carry both positive and negative current.
11 NC unconnected No connect pin that should be connected to either VDD or VSS.
12 A2 input I2C interface Address 2 input which, together with A1 and A0, allows up to eight devices on a single I2C bus.
13 A1 input I2C interface Address 1 input which, together with A2 and A0, allows up to eight devices on a single I2C bus.
14 VDD power_in Positive power supply input relative to VSS; device performance may not meet data sheet specifications while VDD is below 2.7V.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TSSOP-14
Category ADC/DAC/Data Conversion
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VDD 2.7 5.5 V 4
Operating Temperature Range TA -40 125 °C 16
Nominal Resistance (-502 device) RAB 4 5 6 k -502 devices (Note 1) 5
Resistance tolerance RAB -20 20 % (± 20%) RAB 5
Wiper Resistance RW 75 160 Ω VDD = 5.5 V, IW = 2.0 mA, code = 00h 5
Wiper Resistance RW 75 300 Ω VDD = 2.7 V, IW = 2.0 mA, code = 00h 5
Full-Scale Error (MCP4XX1 only) VWFSE -4 -0.1 LSb 5 k 7-bit, 3.0V VDD 5.5V (MCP4XX1 only) 7
Zero-Scale Error (MCP4XX1 only) VWZSE 0.1 3 LSb 5 k 7-bit, 3.0V VDD 5.5V (MCP4XX1 only) 7
Potentiometer Integral Non-linearity INL -0.5 0.25 0.5 LSb 7-bit, MCP4XX1 devices only (Note 2) 7
Potentiometer Differential Non-linearity DNL -0.25 0.125 0.25 LSb 7-bit, MCP4XX1 devices only (Note 2) 7
Nominal Resistance Match /RAB0-RAB1/ /RAB 0.2 1.25 % MCP46X1 devices only 5
VDD Start Voltage to ensure Wiper Reset VBOR 1.65 V RAM retention voltage (VRAM) < VBOR 4
Delay after device exits the reset state TBORD 10 20 µs Delay after device exits the reset state (VDD > VBOR) 4
Supply Current (write, FSCL 3.4 MHz) IDD 600 µA Serial interface active, HVC/A0 = VIH (or VIL) (Note 11), write all 0's to volatile wiper 0, VDD = 5.5V, FSCL = 3.4 MHz 4
Supply Current (write, FSCL 100 kHz) IDD 250 µA Serial interface active, HVC/A0 = VIH (or VIL) (Note 11), write all 0's to volatile wiper 0, VDD = 5.5V, FSCL = 100 kHz 4
Supply Current, serial interface inactive IDD 2.5 5 µA Serial interface inactive (stop condition, SCL = SDA = VIH), wiper = 0, VDD = 5.5V, HVC/A0 = VIH 4
HVC pin Voltage Range VHV 12.5 V VDD 4.5V 4
Schmitt Trigger High Input Threshold VIH 0.45 VDD All inputs except SDA and SCL, 2.7V VDD 5.5V (allows 2.7V digital VDD with 5V analog VDD) 11
Schmitt Trigger High Input Threshold VIH 0.7 VDD SDA and SCL, 100 kHz 11
Schmitt Trigger Low Input Threshold VIL 0.2 VDD All inputs except SDA and SCL 11
Schmitt Trigger Low Input Threshold VIL 0.3 VDD SDA and SCL, 100 kHz 11
High Voltage Limit VMAX 12.5 V Pin can tolerate VMAX or less 11
Output Low Voltage (SDA) VOL 0.4 V VDD 2.0V, IOL = 3 mA 12
Output Low Voltage (SDA) VOL 0.2 VDD VDD < 2.0V, IOL = 1 mA 12
Input Leakage Current IIL -1 1 µA VIN = VDD and VIN = VSS 12
Weak Pull-up / Pull-down Current IPU 1.75 mA Internal VDD pull-up, VIHH pull-down; VDD = 5.5V, VIHH = 12.5V 12
Maximum current through Terminal A (IAW) IT 2.5 mA Terminal A IAW, W = Full-Scale (FS) 6
Maximum current through Terminal B (IBW) IT 2.5 mA Terminal B IBW, W = Zero Scale (ZS) 6
Maximum current through Terminal W IT 2.5 mA Terminal W IAW or IBW, W = FS or ZS 6
Maximum current Terminal A to Terminal B IAB 1.38 mA IAB, VB = 0V, VA = 5.5V, RAB(MIN) = 4000 6
Voltage on VDD with respect to VSS VDD -0.6 7 V 3
Voltage on HVC/A0, A1, A2, SCL, and SDA with respect to VSS -0.6 12.5 V with respect to VSS 3
Voltage on all other pins (PxA, PxW, PxB) with respect to VSS -0.3 V with respect to VSS 3
Input clamp current IIK -20 20 mA VI < 0, VI > VDD, VI > VPP ON HV pins 3
Output clamp current IOK -20 20 mA VO < 0 or VO > VDD 3
Maximum output current sunk by any Output pin 25 mA 3
Maximum output current sourced by any Output pin 25 mA 3
Maximum current out of VSS pin 100 mA 3
Maximum current into VDD pin 100 mA 3
Maximum current into PxA, PxW and PxB pins -2.5 2.5 mA 3
Storage temperature TA -65 150 °C 3
Ambient temperature with power applied -40 125 °C 3
Package power dissipation, TSSOP-14 1 W TA = +50°C, TJ = +150°C 3
Maximum Junction Temperature TJ 150 °C 3
Nominal Resistance Tempco RAB/T 50 ppm/°C TA = -20°C to +70°C 5
Nominal Resistance Tempco RAB/T 100 ppm/°C TA = -40°C to +85°C 5
Nominal Resistance Tempco RAB/T 150 ppm/°C TA = -40°C to +125°C 5
Ratiometric Tempco VWB/T 15 ppm/°C Code = Midscale (80h or 40h) 5
Leakage current into A, W or B IWL 100 nA MCP4XX1 PxA = PxW = PxB = VSS 6
Bandwidth -3 dB BW 2 MHz 5 k 7-bit, Code = 40h, load = 30 pF 8
Capacitance (PA) CAW 75 pF f = 1 MHz, Code = Full-Scale 10
Capacitance (PW) CW 120 pF f = 1 MHz, Code = Full-Scale 10
Pin Capacitance CIN, COUT 10 pF fC = 3.4 MHz 12

CAD (KiCad official)

  • Symbol: MCP4641-502E
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: mcp4641-502e-etched.step / mcp4641-502e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp4641-502e.step / mcp4641-502e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (102 pp, sha256 ee77464c39584a73, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF