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MCP4641-103E
Public Made by Adomby adom
Microchip Tech Digital Potentiometers, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMCP4641-103E
Microchip Tech · Digital Potentiometers · TSSOP-14
MCP4641-103E from Microchip Tech, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | HVC/A0 | input | High-voltage-tolerant (up to 12.5V) Schmitt-trigger input serving as I2C Address 0 (latched at POR/BOR) and as the High Voltage command pin when at VIHH. |
| 2 | SCL | input | I2C serial clock input from the host; the device is a slave and accepts only external clock signals. |
| 3 | SDA | bidirectional | I2C serial data I/O with an open-drain N-channel output driver. |
| 4 | VSS | power_in | Device ground reference. |
| 5 | P1B | passive | Potentiometer 1 terminal B, the fixed zero-scale connection (wiper 0x00); voltage must be between VSS and VDD. |
| 6 | P1W | passive | Potentiometer 1 wiper terminal; voltage must be between VSS and VDD. |
| 7 | P1A | passive | Potentiometer 1 terminal A, the fixed full-scale connection; voltage must be between VSS and VDD. |
| 8 | P0A | passive | Potentiometer 0 terminal A, the fixed full-scale connection; voltage must be between VSS and VDD. |
| 9 | P0W | passive | Potentiometer 0 wiper terminal; voltage must be between VSS and VDD. |
| 10 | P0B | passive | Potentiometer 0 terminal B, the fixed zero-scale connection (wiper 0x00); voltage must be between VSS and VDD. |
| 11 | NC | unconnected | No connection per the pin table; the pin description says these pins should be connected to either VDD or VSS. |
| 12 | A2 | input | High-voltage-tolerant Schmitt-trigger I2C Address 2 input; with A1 and A0 allows up to eight devices on one I2C bus. |
| 13 | A1 | input | High-voltage-tolerant Schmitt-trigger I2C Address 1 input; with A2 and A0 allows up to eight devices on one I2C bus. |
| 14 | VDD | power_in | Positive power supply input relative to VSS; specified 2.7V to 5.5V (device operation 1.8V to 5.5V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TSSOP-14 |
| Category | ADC/DAC/Data Conversion |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Nominal resistance RAB (-103) | RAB | 8 | 10 | 12 | kΩ | -103 devices (Note 1) | 5 |
| Resistance tolerance | RAB | -20 | 20 | % | 5 | ||
| Supply Voltage | VDD | 2.7 | 5.5 | V | 4 | ||
| Supply Voltage (serial interface only) | VDD | 1.8 | 2.7 | V | Serial Interface only. | 4 | |
| Wiper resistance 5.5V | RW | 75 | 160 | Ω | VDD = 5.5 V, IW = 2.0 mA, code = 00h | 5 | |
| Wiper resistance 2.7V | RW | 75 | 300 | Ω | VDD = 2.7 V, IW = 2.0 mA, code = 00h | 5 | |
| Nominal resistance match (MCP46X1) | /RAB0-RAB1//RAB | 0.2 | 1.25 | % | MCP46X1 devices only | 5 | |
| BOR start voltage | VBOR | 1.65 | V | RAM retention voltage (VRAM) < VBOR | 4 | ||
| Delay after reset exit | TBORD | 10 | 20 | µs | VDD > VBOR | 4 | |
| Supply current, active 3.4 MHz | IDD | 600 | µA | Serial Interface Active, VDD = 5.5V, FSCL = 3.4 MHz | 4 | ||
| Supply current, active 100 kHz | IDD | 250 | µA | Serial Interface Active, VDD = 5.5V, FSCL = 100 kHz | 4 | ||
| Supply current, inactive | IDD | 2.5 | 5 | µA | Serial Interface Inactive, VDD = 5.5V, HVC/A0 = VIH | 4 | |
| Full-scale error 10k 7-bit | VWFSE | -2 | -0.1 | LSb | 10 k 7-bit 3.0V ≤ VDD ≤ 5.5V | 7 | |
| Zero-scale error 10k 7-bit | VWZSE | 0.1 | 2 | LSb | 10 k 7-bit 3.0V ≤ VDD ≤ 5.5V | 7 | |
| Potentiometer INL 7-bit | INL | -0.5 | 0.25 | 0.5 | LSb | 7-bit, MCP4XX1 only (Note 2) | 7 |
| Potentiometer DNL 7-bit | DNL | -0.25 | 0.125 | 0.25 | LSb | 7-bit, MCP4XX1 only (Note 2) | 7 |
| Max current through terminals A, W or B | IT | 2.5 | mA | Terminal W IAW or IBW, W = FS or ZS | 6 | ||
| Max IAB current RAB(MIN)=8000 | IAB | 0.688 | mA | VB = 0V, VA = 5.5V, RAB(MIN) = 8000 | 6 | ||
| Nominal resistance tempco | ΔRAB/ΔT | 50 | ppm/°C | TA = -20°C to +70°C | 5 | ||
| Nominal resistance tempco | ΔRAB/ΔT | 100 | ppm/°C | TA = -40°C to +85°C | 5 | ||
| Nominal resistance tempco | ΔRAB/ΔT | 150 | ppm/°C | TA = -40°C to +125°C | 5 | ||
| Ratiometric tempco | ΔVWB/ΔT | 15 | ppm/°C | Code = Midscale (80h or 40h) | 5 | ||
| Resistor terminal voltage range | VA,VW,VB | 0 | 5.5 | V | Vss to VDD; Note 5, Note 6 | 5 | |
| Rheostat INL 7-bit 10k | R-INL | -1.125 | 0.5 | 1.125 | LSb | 10 k 7-bit 5.5V, IW = 450 µA | 9 |
| Rheostat INL 7-bit 10k | R-INL | -4 | 2.5 | 4 | LSb | 10 k 7-bit 3.0V, IW = 240 µA (Note 7) | 9 |
| Rheostat DNL 7-bit 10k | R-DNL | -0.375 | 0.25 | 0.375 | LSb | 10 k 7-bit 5.5V, IW = 450 µA | 10 |
| Rheostat DNL 7-bit 10k | R-DNL | -0.75 | 0.5 | 0.75 | LSb | 10 k 7-bit 3.0V, IW = 240 µA (Note 7) | 10 |
| Bandwidth -3 dB 10k 7-bit | BW | 1 | MHz | 10 k 7-bit Code = 40h, load = 30 pF | 8 | ||
| Capacitance PA | CAW | 75 | pF | f =1 MHz, Code = Full-Scale | 10 | ||
| Capacitance PW | CW | 120 | pF | f =1 MHz, Code = Full-Scale | 10 | ||
| Capacitance PB | CBW | 75 | pF | f =1 MHz, Code = Full-Scale | 10 | ||
| Input high threshold (except SDA/SCL) | VIH | 0.45 | V | 2.7V ≤ VDD ≤ 5.5V; min = 0.45 VDD | 11 | ||
| Input high threshold SDA/SCL | VIH | 0.7 | 12.5 | V | min = 0.7 VDD, max = VMAX; 100 kHz to 3.4 MHz | 11 | |
| Input low threshold (except SDA/SCL) | VIL | 0.2 | V | max = 0.2 VDD; all inputs except SDA and SCL | 11 | ||
| Input low threshold SDA/SCL | VIL | -0.5 | 0.3 | V | max = 0.3 VDD; SDA and SCL | 11 | |
| High voltage limit | VMAX | 12.5 | V | Pin can tolerate VMAX or less. | 11 | ||
| Output low voltage | VOL | 0 | 0.4 | V | VDD ≥ 2.0V, IOL = 3 mA | 12 | |
| Input leakage current | IIL | -1 | 1 | µA | VIN = VDD and VIN = VSS | 12 | |
| Pin capacitance | CIN, COUT | 10 | pF | fC = 3.4 MHz | 12 | ||
| Power supply sensitivity | PSS | 0.0015 | 0.0035 | %/% | 7-bit VDD = 2.7V to 5.5V, VA = 2.7V, Code = 40h (MCP4XX2 only) | 12 | |
| SCL frequency, standard mode | FSCL | 0 | 100 | kHz | Cb = 400 pF, 1.8V - 5.5V | 13 | |
| SCL frequency, fast mode | FSCL | 0 | 400 | kHz | Cb = 400 pF, 2.7V - 5.5V | 13 | |
| SCL frequency, high-speed 3.4 | FSCL | 0 | 3.4 | MHz | Cb = 100 pF, 4.5V - 5.5V | 13 | |
| Clock high time 400 kHz | THIGH | 600 | ns | 2.7V-5.5V | 14 | ||
| Clock low time 400 kHz | TLOW | 1300 | ns | 2.7V-5.5V | 14 | ||
| Data input setup time 400 kHz | TSU:DAT | 100 | ns | 400 kHz mode | 15 | ||
| Output valid from clock 400 kHz | TAA | 900 | ns | 400 kHz mode | 15 | ||
| Voltage on VDD | VDD | -0.6 | 7 | V | with respect to VSS | 3 | |
| Voltage on HVC/A0, A1, A2, SCL, SDA | -0.6 | 12.5 | V | with respect to VSS | 3 | ||
| Input clamp current | IIK | -20 | 20 | mA | VI < 0, VI > VDD, VI > VPP on HV pins | 3 | |
| Output clamp current | IOK | -20 | 20 | mA | VO < 0 or VO > VDD | 3 | |
| Max current into PxA, PxW, PxB | -2.5 | 2.5 | mA | 3 | |||
| Max current into VDD pin | 100 | mA | 3 | ||||
| Storage temperature | -65 | 150 | °C | 3 | |||
| Ambient temperature with power applied | -40 | 125 | °C | 3 | |||
| Package power dissipation TSSOP-14 | 1 | W | TA = +50°C, TJ = +150°C | 3 | |||
| Maximum junction temperature | TJ | 150 | °C | 3 | |||
| Soldering temperature of leads | 300 | °C | 10 seconds | 3 | |||
| Operating temperature range | TA | -40 | 125 | °C | 16 |
CAD (KiCad official)
- Symbol:
MCP4641-103E - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
mcp4641-103e-etched.step/mcp4641-103e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp4641-103e.step/mcp4641-103e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (102 pp, sha256
ee77464c39584a73, retrieved 2026-10-24, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).