MCP4632-104E from Microchip Tech, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	HVC/A0	input	High Voltage Command / Address 0 input is latched at POR/BOR as the A0 address bit, and it is a high-voltage tolerant Schmitt-trigger input (digital inputs tolerate up to 12.5V).
2	SCL	input	I2C serial clock input, connected to the host controller SCL; the device is a slave and accepts only external clock signals, with a high-voltage tolerant Schmitt-trigger input.
3	SDA	bidirectional	I2C serial data I/O, implemented as an open-drain N-channel driver, with a high-voltage tolerant Schmitt-trigger input.
4	VSS	power_in	Ground reference for the device; all terminal voltages are specified relative to this pin.
5	P1B	passive	Potentiometer 1 terminal B is the fixed connection to the zero-scale wiper value (0x00), has no polarity, supports both positive and negative current, and must be held between VSS and VDD.
6	P1W	passive	Potentiometer 1 wiper terminal is the adjustable terminal, has no polarity, supports both positive and negative current, and must be held between VSS and VDD.
7	P0W	passive	Potentiometer 0 wiper terminal is the adjustable terminal, has no polarity, supports both positive and negative current, and must be held between VSS and VDD.
8	P0B	passive	Potentiometer 0 terminal B is the fixed connection to the zero-scale wiper value (0x00), has no polarity, supports both positive and negative current, and must be held between VSS and VDD.
9	A1	input	Address 1 input for the I2C interface, which is combined with the other address pins to complete the device address and allow up to eight devices on one bus.
10	VDD	power_in	Positive power supply input referenced to VSS; electrical performance may not meet data sheet specifications while VDD is below 2.7V.

Key specifications

Parameter	Value
Manufacturer	Microchip Tech
Package	MSOP-10
Category	ADC/DAC/Data Conversion
Pins	10

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Nominal resistance RAB (-104 device)	RAB	80	100	120	kΩ	-104 devices (Note 1)	5
Resistance tolerance (±20%)		-20		20	%	Resistance (±20%), -104 devices (Note 1)	5
Supply voltage VDD	VDD	2.7		5.5	V		4
Supply voltage VDD (serial interface only)	VDD	1.8		2.7	V	Serial interface only.	4
Operating temperature range	TA	-40		125	°C		16
Voltage on VDD with respect to VSS	VDD	-0.6		7	V		3
Voltage on HVC/A0, A1, A2, SCL and SDA with respect to VSS		-0.6		12.5	V		3
Voltage on all other pins (PxA, PxW, PxB) with respect to VSS		-0.3			V	Maximum printed as VDD + 0.3V	3
Input clamp current	IIK	-20		20	mA	VI < 0, VI > VDD, VI > VPP on HV pins	3
Output clamp current	IOK	-20		20	mA	VO < 0 or VO > VDD	3
Maximum output current sunk by any output pin				25	mA		3
Maximum output current sourced by any output pin				25	mA		3
Maximum current out of VSS pin				100	mA		3
Maximum current into VDD pin				100	mA		3
Maximum current into PxA, PxW and PxB pins		-2.5		2.5	mA		3
Storage temperature	TA	-65		150	°C		3
Ambient temperature with power applied	TA	-40		125	°C		3
Soldering temperature of leads				300	°C	10 seconds	3
ESD protection on all pins (HBM)				4	kV	HBM	3
ESD protection on all pins (MM)				300	V	MM	3
Maximum junction temperature TJ	TJ			150	°C		3
HVC pin voltage range	VHV			12.5	V	VDD ≥ 4.5V	4
VDD start voltage to ensure wiper reset	VBOR			1.65	V	RAM retention voltage (VRAM) < VBOR	4
Delay after device exits the reset state (VDD > VBOR)	TBORD		10	20	µs		4
Supply current, serial interface active	IDD			600	µA	Serial interface active, HVC/A0 = VIH (or VIL), write all 0s to volatile wiper 0, VDD = 5.5V, FSCL = 3.4 MHz	4
Supply current, serial interface active	IDD			250	µA	Serial interface active, HVC/A0 = VIH (or VIL), write all 0s to volatile wiper 0, VDD = 5.5V, FSCL = 100 kHz	4
Supply current, serial interface inactive	IDD		2.5	5	µA	Serial interface inactive (stop condition, SCL = SDA = VIH), wiper = 0, VDD = 5.5V, HVC/A0 = VIH	4
Wiper resistance RW	RW		75	160	Ω	VDD = 5.5 V, IW = 2.0 mA, code = 00h	5
Wiper resistance RW	RW		75	300	Ω	VDD = 2.7 V, IW = 2.0 mA, code = 00h	5
Nominal resistance match /RBW0-RBW1//RBW	/RBW0-RBW1//RBW		0.25	1.5	%	MCP46X2 devices only, Code = Full-Scale	5
Power supply sensitivity PSS (7-bit)	PSS		0.0015	0.0035	%/%	7-bit, VDD = 2.7V to 5.5V, VA = 2.7V, Code = 40h	12
Maximum current through terminal A (W = FS)	IT			2.5	mA	Terminal A IAW, W = Full-Scale (FS)	6
Maximum current through terminal B (W = ZS)	IT			2.5	mA	Terminal B IBW, W = Zero Scale (ZS)	6
Maximum current through terminal W	IT			2.5	mA	Terminal W IAW or IBW, W = FS or ZS	6
Maximum current through terminal A and terminal B (RAB(MIN) = 80000)	IT			0.069	mA	IAB, VB = 0V, VA = 5.5V, RAB(MIN) = 80000	6
Rheostat integral non-linearity R-INL (7-bit, 5.5V)	R-INL	-0.8		0.8	LSb	7-bit, 5.5V, IW = 45 µA	9
Rheostat integral non-linearity R-INL (7-bit, 3.0V)	R-INL	-1.125	0.25	1.125	LSb	7-bit, 3.0V, IW = 24 µA (Note 7)	9
Rheostat differential non-linearity R-DNL (7-bit, 5.5V)	R-DNL	-0.375		0.375	LSb	7-bit, 5.5V, IW = 45 µA	10
Rheostat differential non-linearity R-DNL (7-bit, 3.0V)	R-DNL	-0.375		0.375	LSb	7-bit, 3.0V, IW = 24 µA (Note 7)	10
Schmitt trigger high input threshold (all inputs except SDA and SCL)	VIH	0.45			VDD	All inputs except SDA and SCL, 2.7V ≤ VDD ≤ 5.5V	11
Schmitt trigger high input threshold (all inputs except SDA and SCL)	VIH	0.5			VDD	All inputs except SDA and SCL, 1.8V ≤ VDD ≤ 2.7V	11
Schmitt trigger high input threshold (SDA and SCL)	VIH	0.7			VDD	SDA and SCL, 100 kHz; upper limit VMAX	11
Schmitt trigger low input threshold (all inputs except SDA and SCL)	VIL			0.2	VDD	All inputs except SDA and SCL	11
Schmitt trigger low input threshold (SDA and SCL)	VIL	-0.5		0.3	VDD	SDA and SCL, 100 kHz	11
Hysteresis of Schmitt trigger inputs (all inputs except SDA and SCL)	VHYS	0.1			VDD	All inputs except SDA and SCL	11
High voltage limit VMAX	VMAX			12.5	V	Pin can tolerate VMAX or less.	11
Output low voltage (SDA)	VOL			0.2	VDD	VDD < 2.0V, IOL = 1 mA	12
Output low voltage (SDA)	VOL			0.4	V	VDD ≥ 2.0V, IOL = 3 mA	12
Weak pull-up / pull-down current IPU	IPU			1.75	mA	Internal VDD pull-up, VIHH pull-down; VDD = 5.5V, VIHH = 12.5V	12
Input leakage current	IIL	-1		1	µA	VIN = VDD and VIN = VSS	12
Nominal resistance tempco RAB/T	RAB/T		50		ppm/°C	TA = -20°C to +70°C	5
Nominal resistance tempco RAB/T	RAB/T		100		ppm/°C	TA = -40°C to +85°C	5
Nominal resistance tempco RAB/T	RAB/T		150		ppm/°C	TA = -40°C to +125°C	5
Ratiometric tempco VWB/T	VWB/T		15		ppm/°C	Code = Midscale (80h or 40h)	5
Thermal resistance, 10L-MSOP	θJA		202		°C/W		16

CAD (KiCad official)

Symbol: MCP4632-104E
Footprint: Package_SO:MSOP-10_3x3mm_P0.5mm
3D model: MSOP-10 (KiCad packages3D, STEP)
3D model files: mcp4632-104e-etched.step / mcp4632-104e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp4632-104e.step / mcp4632-104e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Microchip Tech datasheet (102 pp, sha256 ee77464c39584a73, retrieved 2026-10-30, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

MCP4632-104E

Verified MCP4632-104E

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

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