MCP45HV51T-502E from Microchip Tech, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VL	power_in	Positive digital power supply input relative to DGND, ranging from 1.8V to 5.5V, with a decoupling capacitor to DGND recommended.
2	SCL	input	I2C serial clock input (Schmitt trigger), input-only since the device is an I2C slave, connected to the host controller's SCL.
3	A1	input	I2C address bit 1 input (Schmitt trigger) which together with A0 allows up to four devices on one I2C bus.
4	SDA	bidirectional	I2C serial data input/output (Schmitt trigger), open-drain N-channel driver used to read and write the Wiper and TCON registers.
5	A0	input	I2C address bit 0 input (Schmitt trigger) whose value is latched at POR/BOR and which together with A1 completes the device address.
6	WLAT	input	Wiper latch enable input: 0 transfers the received shift register value to the Wiper register, 1 holds the received value in the buffer, allowing synchronization to an external event such as zero crossing.
7	NC	unconnected	Not internally connected to the die; connect to DGND or VL to reduce noise coupling.
8	SHDN	input	Shutdown input (Schmitt trigger) that forces the resistor network terminals into the hardware shutdown state.
9	DGND	power_in	Digital ground reference of the device.
10	V-	power_in	Analog negative potential supply, which must be lower than or equal to the DGND potential.
11	P0B	passive	Potentiometer 0 Terminal B, the fixed connection to zero-scale wiper value (0x00), non-polarized, with voltage required to be between V+ and V-.
12	P0W	passive	Potentiometer 0 wiper terminal, non-polarized, supporting positive and negative current, with voltage required to be between V+ and V-.
13	P0A	passive	Potentiometer 0 Terminal A, the fixed connection to full-scale wiper value (0xFF for 8-bit), non-polarized, with voltage required to be between V+ and V-.
14	V+	power_in	Analog positive potential supply, which must be at a higher potential than V-, with a maximum of +36V.

Key specifications

Parameter	Value
Manufacturer	Microchip Tech
Package	TSSOP-14
Category	ADC/DAC/Data Conversion
Pins	14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Digital supply voltage	VL	2.7		5.5	V	With respect to DGND	4
Analog supply voltage max	V+			36	V	With respect to V-	4
Resistor network supply voltage	VRN			36	V	Delta voltage between V+ and V-	4
Operating temperature	TA	-40		125	°C	Extended	21
Resistance A to B	RAB	4	5	6	kΩ	-502 devices, V+/V- = 10V to 36V	5
Resistance tolerance		-20		20	%	RAB	5
Supply current, serial interface active	IDDD		45	650	µA	Write all 0's to Volatile Wiper 0, VL = 5.5V, FSCL = 3.4 MHz, V- = DGND	5
Supply current, serial interface inactive	IDDD		4	7	µA	VL = 5.5V, SCL = VIH, Wiper = 0, V- = DGND	5
Analog supply current V+ to V-	IDDA			5	µA	PxA = PxB = PxW, DGND = V- +(V+/2)	5
Delay after exit from Reset	TBORD		10	20	µs	VL > VBOR	5
RAB current	IAB			9	mA	-502 devices 36V / RAB(MIN), V- = -18V, V+ = +18V	5
Wiper resistance	RW		75	170	Ω	IW = 1 mA V+ = +18V, V- = -18V, code = 00h, PxA = floating, PxB = V-	6
Wiper resistance	RW		145	200	Ω	IW = 1 mA V+ = +5.0V, V- = -5.0V, code = 00h, PxA = floating, PxB = V-	6
Terminal current	IT, IW			25	mA	-502 devices IBW(W ≠ ZS) and IAW(W ≠ FS)	6
Terminal current at ZS/FS	IT, IW			36	mA	IBW(W = ZS), or IAW(W = FS)	6
Full scale error 5k 8-bit	VWFSE	-10.5			LSb	5 k 8-bit VAB = 20V to 36V	7
Full scale error 5k 8-bit	VWFSE	-8.5			LSb	VAB = 20V to 36V, -40°C ≤ TA ≤ +85°C (Note 2)	7
Full scale error 5k 8-bit	VWFSE	-14			LSb	VAB = 10V to 36V	7
Zero scale error 5k 8-bit	VWZSE			9.5	LSb	5 k 8-bit VAB = 20V to 36V	8
Zero scale error 5k 8-bit	VWZSE			8.5	LSb	VAB = 20V to 36V, -40°C ≤ TA ≤ +85°C (Note 2)	8
Zero scale error 5k 8-bit	VWZSE			14.5	LSb	VAB = 10V to 36V	8
Potentiometer INL 5k 8-bit	P-INL	-1	0.5	1	LSb	5 k 8-bit VAB = 10V to 36V	9
Potentiometer DNL 5k 8-bit	P-DNL	-0.7	0.25	0.7	LSb	5 k 8-bit VAB = 10V to 36V	9
Potentiometer DNL 5k 8-bit	P-DNL	-0.5	0.25	0.5	LSb	VAB = 20V to 36V (Note 2)	9
Rheostat INL 5k 8-bit	R-INL	-2		2	LSb	IW = 6.0 mA, (V+ - V-) = 36V (Note 2)	11
Rheostat INL 5k 8-bit	R-INL	-2.5		2.5	LSb	IW = 3.3 mA, (V+ - V-) = 20V (Note 2)	11
Rheostat INL 5k 8-bit	R-INL	-4.5		4.5	LSb	IW = 1.7 mA, (V+ - V-) = 10V	11
Rheostat DNL 5k 8-bit	R-DNL	-0.5		0.5	LSb	IW = 6.0 mA, (V+ - V-) = 36V (Note 2)	12
Rheostat DNL 5k 8-bit	R-DNL	-0.8		0.8	LSb	IW = 1.7 mA, (V+ - V-) = 10V	12
Input leakage current	IIL	-1		1	µA	VIN = VL and VIN = DGND	13
Power supply sensitivity 8-bit	PSS		0.0015	0.0035	%/%	VL = 2.7V to 5.5V, V+ = 18V, V- = -18V, Code = 7Fh	14
Nominal resistance tempco	ΔRAB/ΔT		50		ppm/°C	TA = -40°C to +85°C	6
Nominal resistance tempco	ΔRAB/ΔT		100		ppm/°C	TA = -40°C to +125°C	6
Ratiometric tempco	ΔVBW/ΔT		15		ppm/°C	Code = Mid scale (7Fh or 3Fh)	6
Leakage current into A, W or B	ITL		5		nA	A = W = B = V-	6
Bandwidth -3 dB 5k 8-bit	BW		480		kHz	5 k 8-bit Code = 7Fh, load = 30 pF	10
VW settling time 5k	tS		1		µs	5 k Code = 00h -> FFh (7Fh); FFh (7Fh) -> 00h, VA = 10V, VB = 0V, ±1LSb, CL = 50 pF	16
Power dissipation 5k	PDISS		260		mW	VL = 5.5V, V+ = 18V, V- = -18V	14
Capacitance PA	CA		75		pF	Measured to V-, f =1 MHz, Wiper code = Mid Scale	13
Capacitance PW	CW		120		pF	Measured to V-, f =1 MHz, Wiper code = Mid Scale	13
Capacitance PB	CB		75		pF	Measured to V-, f =1 MHz, Wiper code = Mid Scale	13
SCL frequency, High Speed 3.4	FSCL	0		3.4	MHz	Cb = 100 pF, 4.5V ≤ VL ≤ 5.5V	17
SCL frequency, Fast mode	FSCL	0		400	kHz	Cb = 400 pF, 2.7V ≤ VL ≤ 5.5V	17
Voltage on VL with respect to DGND		-0.6		7	V		3
Voltage on V+ with respect to DGND		-0.3		40	V		3
Continuous current into PxA, PxW, PxB (RAB = 5 k)		-25		25	mA	RAB = 5 k	3
Package power dissipation TSSOP-14				1000	mW	TA = +50°C, TJ = +150°C	3
ESD HBM		-5		5	kV	All pins	3
Maximum junction temperature	TJ			150	°C		3
Storage temperature		-65		150	°C		3
Soldering temperature of leads				300	°C	10 seconds	3
Thermal resistance 14L-TSSOP	θJA		100		°C/W		21

CAD (KiCad official)

Symbol: MCP45HV51T-502E
Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
3D model: TSSOP-14 (KiCad packages3D, STEP)
3D model files: mcp45hv51t-502e-etched.step / mcp45hv51t-502e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp45hv51t-502e.step / mcp45hv51t-502e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Microchip Tech datasheet (100 pp, sha256 ab854db7c83242c1, retrieved 2026-10-30, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

MCP45HV51T-502E

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3D Model

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