component
MCP45HV51-103E
Public Made by Adomby adom
Microchip Tech Digital Potentiometers, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 7h ago |
| viewers | 7h ago |
| mcp45hv51-103e-etched.glb | 7h ago |
| mcp45hv51-103e-etched.step | 7h ago |
| mcp45hv51-103e-hero.glb | 7h ago |
| mcp45hv51-103e-hero.overlay.json | 7h ago |
| mcp45hv51-103e.glb | 7h ago |
| mcp45hv51-103e.kicad_mod | 7h ago |
| mcp45hv51-103e.kicad_sym | 7h ago |
| mcp45hv51-103e.lbr | 7h ago |
| mcp45hv51-103e.step | 7h ago |
| package.json | 7h ago |
| page.json | 7h ago |
| README.md | 7h ago |
MCP45HV51-103E
Microchip Tech · Digital Potentiometers · TSSOP-14
MCP45HV51-103E from Microchip Tech, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VL | power_in | Positive digital power supply input, relative to DGND, ranging from 1.8V to 5.5V, with a decoupling capacitor to DGND recommended. |
| 2 | SCL | input | I2C serial clock input, input-only for the I2C client device, with a Schmitt-trigger buffer. |
| 3 | A1 | input | I2C address bit 1 input, which together with A0 sets the device address so up to four devices can share one I2C bus. |
| 4 | SDA | bidirectional | I2C serial data pin, an open-drain N-channel driver that carries data in and out for the wiper and TCON registers. |
| 5 | A0 | input | I2C address bit 0 input, latched at POR/BOR, which together with A1 completes the device address. |
| 6 | WLAT | input | Wiper latch enable that holds off transfer of the received wiper value to the Wiper register while held high and allows the update when low. |
| 7 | NC | unconnected | Not internally connected to the die; to reduce noise coupling, connect to either DGND or VL. |
| 8 | SHDN | input | Shutdown input that forces the resistor network terminals into the hardware shutdown state. |
| 9 | DGND | power_in | Digital ground reference for the device, with VL and the digital logic referenced to it. |
| 10 | V- | power_in | Analog negative potential supply, which must be lower than or equal to the DGND pin potential. |
| 11 | P0B | passive | Potentiometer 0 Terminal B, the fixed connection to the zero-scale wiper value, with voltage that must be between V+ and V-. |
| 12 | P0W | passive | Potentiometer 0 wiper terminal, the adjustable terminal, with voltage that must be between V+ and V- and supporting both positive and negative current. |
| 13 | P0A | passive | Potentiometer 0 Terminal A, the fixed connection to the full-scale wiper value, with voltage that must be between V+ and V-. |
| 14 | V+ | power_in | Analog positive potential supply, which must have a higher potential than the V- pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TSSOP-14 |
| Category | ADC/DAC/Data Conversion |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Voltage on V- with respect to DGND | -40 | 0.6 | V | 3 | |||
| Voltage on V+ with respect to DGND | -0.3 | 40 | V | 3 | |||
| Voltage on V+ with respect to V- | -0.3 | 40 | V | 3 | |||
| Voltage on VL with respect to DGND | -0.6 | 7 | V | 3 | |||
| Voltage on VL with respect to V- | -0.6 | 40 | V | 3 | |||
| Voltage on all other pins (PxA, PxW, PxB) with respect to V- | -0.3 | V | 3 | ||||
| Input clamp current | IIK | -20 | 20 | mA | VI < 0, VI > VL, VI > VPP on HV pins | 3 | |
| Output clamp current | IOK | -20 | 20 | mA | VO < 0 or VO > VL | 3 | |
| Maximum current out of DGND pin | 100 | mA | 3 | ||||
| Maximum current into VL pin | 100 | mA | 3 | ||||
| Maximum current into PXA, PXW, PXB pins (Continuous), RAB = 10 k | -12.5 | 12.5 | mA | RAB = 10 k | 3 | ||
| Maximum output current sunk by any Output pin | 25 | mA | 3 | ||||
| Maximum output current sourced by any Output pin | 25 | mA | 3 | ||||
| Package Power Dissipation TSSOP-14 | 1000 | mW | TA = +50°C, TJ = +150°C | 3 | |||
| ESD protection Human Body Model (HBM) | -5 | 5 | kV | 3 | |||
| Maximum Junction Temperature (TJ) | TJ | 150 | °C | 3 | |||
| Storage temperature | -65 | 150 | °C | 3 | |||
| Ambient temperature with power applied | -40 | 125 | °C | 3 | |||
| Digital Positive Supply Voltage (VL) | VL | 2.7 | 5.5 | V | With respect to DGND (Note 4) | 4 | |
| Digital Positive Supply Voltage (VL), low range | VL | 1.8 | 5.5 | V | VL V- + 2.7V (Note 1, Note 4) | 4 | |
| Analog Positive Supply Voltage (V+) | V+ | 36 | V | With respect to V- (Note 4) | 4 | ||
| Analog Negative Supply Voltage (V-) | V- | 0 | V | With respect to DGND and with VL = 1.8V | 4 | ||
| Resistor Network Supply Voltage | VRN | 36 | V | Delta voltage between V+ and V- (Note 4) | 4 | ||
| VL Start Voltage to ensure Wiper Reset | VDPOR | 1.8 | V | With respect to DGND, V+ > 6.0V | 4 | ||
| V+ Voltage to ensure Wiper Reset | VAPOR | 6 | V | With respect to V-, VL = 0V | 4 | ||
| Digital to Analog Level Shifter Operational Voltage | VLS | 2.3 | V | VL to V- voltage. | 4 | ||
| Power Rail Voltages during Power-Up, digital powers up first | VLPOR | 5.5 | V | Digital Powers (VL/DGND) up 1st: V+ and V- floating or as V+/V- powers-up (Note 18) | 4 | ||
| Supply Current, serial interface active (IDDD) | IDDD | 45 | 650 | µA | Serial Interface Active, Write all 0's to Volatile Wiper 0 (address 0h), VL = 5.5V, FSCL = 3.4 MHz, V- = DGND | 5 | |
| Supply Current, serial interface inactive (IDDD) | IDDD | 4 | 7 | µA | Serial Interface Inactive, VL = 5.5V, SCL = VIH, Wiper = 0, V- = DGND | 5 | |
| Supply Current analog (IDDA) | IDDA | 5 | µA | Current V+ to V-, PxA = PxB = PxW, DGND = V- +(V+/2) | 5 | ||
| Resistance RAB (±20%), -103 device | RAB | 8 | 10 | 12 | k | -103 devices, V+/V- = 10V to 36V | 5 |
| Resistance tolerance (±20%) | RAB | -20 | 20 | % | 5 | ||
| RAB Current, -103 device | IAB | 4.5 | mA | -103 devices | 5 | ||
| Wiper Resistance (RW), IW = 1 mA, V+ = +18V | RW | 75 | 170 | Ω | IW = 1 mA V+ = +18V, V- = -18V, code = 00h, PxA = floating, PxB = V- | 6 | |
| Wiper Resistance (RW), IW = 1 mA, V+ = +5.0V | RW | 145 | 200 | Ω | IW = 1 mA V+ = +5.0V, V- = -5.0V, code = 00h, PxA = floating, PxB = V- (Note 2) | 6 | |
| Current through Terminals (A, B, Wiper), -103 device | IT, IW | 12.5 | mA | -103 devices IBW(W ≠ ZS) and IAW(W ≠ FS) | 6 | ||
| Current through Terminals (A, B, Wiper) at zero/full scale | IT, IW | 36 | mA | IBW(W = ZS), or IAW(W = FS) | 6 | ||
| Input Leakage Current (digital) | IIL | -1 | 1 | uA | VIN = VL and VIN = DGND | 13 | |
| Potentiometer Integral Nonlinearity, 10 k 8-bit | P-INL | -1 | 0.5 | 1 | LSb | 8-bit VAB = 10V to 36V | 9 |
| Potentiometer Integral Nonlinearity, 10 k 7-bit | P-INL | -0.5 | 0.25 | 0.5 | LSb | 7-bit VAB = 10V to 36V | 9 |
| Potentiometer Differential Nonlinearity, 10 k 8-bit | P-DNL | -0.375 | 0.125 | 0.375 | LSb | 8-bit VAB = 10V to 36V | 9 |
| Potentiometer Differential Nonlinearity, 10 k 7-bit | P-DNL | -0.25 | 0.1 | 0.25 | LSb | 7-bit VAB = 10V to 36V | 9 |
| Rheostat Integral Nonlinearity, 10 k 8-bit, 36V | R-INL | -1.2 | 1.2 | LSb | 8-bit IW = 3.0 mA, (V+ - V-) = 36V (Note 2) | 11 | |
| Rheostat Integral Nonlinearity, 10 k 8-bit, 20V | R-INL | -1.75 | 1.75 | LSb | 8-bit IW = 1.7 mA, (V+ - V-) = 20V (Note 2) | 11 | |
| Rheostat Integral Nonlinearity, 10 k 8-bit, 10V | R-INL | -2 | 2 | LSb | 8-bit IW = 830 µA, (V+ - V-) = 10V | 11 | |
| Rheostat Integral Nonlinearity, 10 k 7-bit, 36V | R-INL | -0.6 | 0.6 | LSb | 7-bit IW = 3.0 mA, (V+ - V-) = 36V (Note 2) | 11 | |
| Rheostat Integral Nonlinearity, 10 k 7-bit, 20V | R-INL | -0.8 | 0.8 | LSb | 7-bit IW = 1.7 mA, (V+ - V-) = 20V (Note 2) | 11 | |
| Rheostat Integral Nonlinearity, 10 k 7-bit, 10V | R-INL | -1.1 | 1.1 | LSb | 7-bit IW = 830 µA, (V+ - V-) = 10V | 11 | |
| Rheostat Differential Nonlinearity, 10 k 8-bit, 36V | R-DNL | -0.5 | 0.5 | LSb | 8-bit IW = 3.0 mA, (V+ - V-) = 36V (Note 2) | 12 | |
| Rheostat Differential Nonlinearity, 10 k 8-bit, 20V | R-DNL | -0.5 | 0.5 | LSb | 8-bit IW = 1.7 mA, (V+ - V-) = 20V (Note 2) | 12 | |
| Rheostat Differential Nonlinearity, 10 k 8-bit, 10V | R-DNL | -0.5 | 0.5 | LSb | 8-bit IW = 830 µA, (V+ - V-) = 10V | 12 | |
| Rheostat Differential Nonlinearity, 10 k 7-bit, 36V | R-DNL | -0.25 | 0.25 | LSb | 7-bit IW = 3.0 mA, (V+ - V-) = 36V (Note 2) | 12 | |
| Rheostat Differential Nonlinearity, 10 k 7-bit, 20V | R-DNL | -0.25 | 0.25 | LSb | 7-bit IW = 1.7 mA, (V+ - V-) = 20V (Note 2) | 12 | |
| Rheostat Differential Nonlinearity, 10 k 7-bit, 10V | R-DNL | -0.25 | 0.25 | LSb | 7-bit IW = 830 µA, (V+ - V-) = 10V | 12 | |
| Serial clock frequency FSCL, standard mode | FSCL | 0 | 100 | kHz | Cb = 400 pF, 1.8V VL 5.5V | 17 | |
| Serial clock frequency FSCL, fast mode | FSCL | 0 | 400 | kHz | Cb = 400 pF, 2.7V VL 5.5V | 17 | |
| Operating temperature range TA | TA | -40 | 125 | °C | 21 | ||
| Ratiometric Tempco (VBW/T) | VBW/T | 15 | ppm/°C | Code = Mid scale (7Fh or 3Fh) | 6 | ||
| Nominal Resistance Tempco (RAB/T) | RAB/T | 50 | ppm/°C | TA = -40°C to +85°C | 6 | ||
| Thermal Resistance, 14L-TSSOP (JA) | JA | 100 | °C/W | 21 |
CAD (KiCad official)
- Symbol:
MCP45HV51-103E - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
mcp45hv51-103e-etched.step/mcp45hv51-103e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp45hv51-103e.step/mcp45hv51-103e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (102 pp, sha256
18feae380a4045ff, retrieved 2026-10-27, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusoff(skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).