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MCP4552-502E

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Microchip Tech Digital Potentiometers, MSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MCP4552-502E

Microchip Tech · Digital Potentiometers · MSOP-8

MCP4552-502E from Microchip Tech, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 HVC/A0 input High-voltage tolerant (up to 12.5V) Schmitt-trigger input that latches the I2C Address 0 bit at POR/BOR and, in operation, selects normal or High Voltage command when at VIHH.
2 SCL input I2C serial clock input from the host controller; the device is a slave and accepts only external clock signals.
3 SDA bidirectional I2C serial data I/O connected to the host controller SDA, with an open-drain N-channel driver.
4 VSS power_in Device ground reference.
5 P0W passive Potentiometer 0 wiper terminal (rheostat wiper), non-polarized, supports positive and negative current, voltage must be between VSS and VDD.
6 P0B passive Potentiometer 0 terminal B, the fixed zero-scale (wiper 0x00) connection, non-polarized, voltage must be between VSS and VDD.
7 A1 input High-voltage tolerant Schmitt-trigger I2C Address 1 input which, with A2 and A0, allows up to eight devices on one I2C bus.
8 VDD power_in Positive power supply input relative to VSS; device operates 1.8V to 5.5V, with specifications characterized from 2.7V to 5.5V.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package MSOP-8
Category ADC/DAC/Data Conversion
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Nominal resistance RAB (-502 device) RAB 4 5 6 kΩ -502 devices (Note 1) 5
Resistance tolerance RAB -20 20 % Resistance (± 20%) 5
Supply voltage VDD 2.7 5.5 V 4
Supply voltage, serial interface only VDD 1.8 2.7 V Serial Interface only 4
VDD start voltage to ensure wiper reset VBOR 1.65 V RAM retention voltage (VRAM) < VBOR 4
Delay after device exits reset state TBORD 10 20 µs VDD > VBOR 4
Supply current, serial active 3.4 MHz IDD 600 µA Serial Interface Active, HVC/A0 = VIH (or VIL), write all 0's to Volatile Wiper 0, VDD = 5.5V, FSCL = 3.4 MHz 4
Supply current, serial active 100 kHz IDD 250 µA Serial Interface Active, HVC/A0 = VIH (or VIL), write all 0's to Volatile Wiper 0, VDD = 5.5V, FSCL = 100 kHz 4
Supply current, serial inactive IDD 2.5 5 µA Serial Interface Inactive (Stop condition, SCL = SDA = VIH), Wiper = 0, VDD = 5.5V, HVC/A0 = VIH 4
Wiper resistance RW 75 160 Ω VDD = 5.5 V, IW = 2.0 mA, code = 00h 5
Wiper resistance RW 75 300 Ω VDD = 2.7 V, IW = 2.0 mA, code = 00h 5
Nominal resistance tempco ΔRAB/ΔT 50 ppm/°C TA = -20°C to +70°C 5
Nominal resistance tempco ΔRAB/ΔT 100 ppm/°C TA = -40°C to +85°C 5
Nominal resistance tempco ΔRAB/ΔT 150 ppm/°C TA = -40°C to +125°C 5
Resistor terminal input voltage range VA,VW,VB 0 5.5 V Vss to VDD, Note 5, Note 6 5
Max current through terminal W IT 2.5 mA Terminal W IAW or IBW, W = FS or ZS 6
Max current terminals A and B, RAB(MIN)=4000 IAB 1.38 mA VB = 0V, VA = 5.5V, RAB(MIN) = 4000 Ω 6
Leakage current into W or B (MCP4XX2) IWL 100 nA MCP4XX2 PxB = PxW = VSS 6
Rheostat INL 5k 8-bit R-INL -1.5 0.5 1.5 LSb 5 k 8-bit, 5.5V, IW = 900 µA 9
Rheostat INL 5k 8-bit R-INL -8.25 4.5 8.25 LSb 5 k 8-bit, 3.0V, IW = 480 µA (Note 7) 9
Rheostat DNL 5k 8-bit R-DNL -0.5 0.25 0.5 LSb 5 k 8-bit, 5.5V, IW = 900 µA 10
Rheostat DNL 5k 8-bit R-DNL -1 0.5 1 LSb 5 k 8-bit, 3.0V, IW = 480 µA (Note 7) 10
Schmitt trigger high input threshold (except SDA, SCL) VIH 0.45 V All inputs except SDA and SCL, 2.7V ≤ VDD ≤ 5.5V; min is 0.45 VDD 11
Schmitt trigger high input threshold (except SDA, SCL) VIH 0.5 V All inputs except SDA and SCL, 1.8V ≤ VDD ≤ 2.7V; min is 0.5 VDD 11
Schmitt trigger high input threshold (SDA, SCL) VIH 0.7 12.5 V SDA and SCL; min is 0.7 VDD, max is VMAX 11
Schmitt trigger low input threshold (except SDA, SCL) VIL 0.2 V All inputs except SDA and SCL; max is 0.2 VDD 11
Schmitt trigger low input threshold (SDA, SCL) VIL -0.5 0.3 V SDA and SCL; max is 0.3 VDD 11
High voltage limit VMAX 12.5 V Pin can tolerate VMAX or less 11
Output low voltage (SDA) VOL 0 0.4 V VDD ≥ 2.0V, IOL = 3 mA 12
Input leakage current IIL -1 1 µA VIN = VDD and VIN = VSS 12
Power supply sensitivity (8-bit) PSS 0.0015 0.0035 %/% VDD = 2.7V to 5.5V, VA = 2.7V, Code = 80h 12
Absolute max VDD VDD -0.6 7 V with respect to VSS 3
Absolute max voltage on HVC/A0, A1, SCL, SDA -0.6 12.5 V with respect to VSS 3
Input clamp current IIK -20 20 mA VI < 0, VI > VDD, VI > VPP on HV pins 3
Output clamp current IOK -20 20 mA VO < 0 or VO > VDD 3
Max current into PxA, PxW, PxB -2.5 2.5 mA 3
Storage temperature Tstg -65 150 °C 3
Ambient temperature with power applied TA -40 125 °C 3
Maximum junction temperature TJ 150 °C 3
Soldering temperature of leads 300 °C 10 seconds 3
Specified/operating temperature range TA -40 125 °C 16
Thermal resistance 8L-MSOP θJA 211 °C/W 16
Ratiometric tempco ΔVWB/ΔT 15 ppm/°C Code = Midscale (80h or 40h) 5
Bandwidth -3 dB 5k 8-bit BW 2 MHz 5 k 8-bit Code = 80h, load = 30 pF 8
I2C clock frequency standard mode FSCL 0 100 kHz Cb = 400 pF, 1.8V - 5.5V 13
I2C clock frequency fast mode FSCL 0 400 kHz Cb = 400 pF, 2.7V - 5.5V 13
I2C clock frequency high-speed 3.4 FSCL 0 3.4 MHz Cb = 100 pF, 4.5V - 5.5V 13

CAD (KiCad official)

  • Symbol: MCP4552-502E
  • Footprint: Package_SO:MSOP-8_3x3mm_P0.65mm
  • 3D model: MSOP-8 (KiCad packages3D, STEP)
  • 3D model files: mcp4552-502e-etched.step / mcp4552-502e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp4552-502e.step / mcp4552-502e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (102 pp, sha256 ee77464c39584a73, retrieved 2026-10-24, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF