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MCP4551T-502E

Microchip Tech · Digital Potentiometers · MSOP-8

MCP4551T-502E from Microchip Tech, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 HVC/A0 input High-voltage-tolerant Schmitt-trigger input serving as I2C Address 0 (latched at POR/BOR) and High Voltage command pin when at VIHH.
2 SCL input I2C serial clock input from the host; the device is a slave and accepts only external clock signals.
3 SDA bidirectional I2C serial data input/output with open-drain N-channel driver.
4 VSS power_in Device ground reference.
5 P0A passive Potentiometer 0 terminal A, the full-scale wiper connection, with voltage required to be between VSS and VDD.
6 P0W passive Potentiometer 0 wiper terminal, with voltage required to be between VSS and VDD.
7 P0B passive Potentiometer 0 terminal B, the zero-scale wiper connection (wiper value 0x00), with voltage required to be between VSS and VDD.
8 VDD power_in Positive power supply input relative to VSS; 2.7V to 5.5V device characteristics specified, 1.8V to 5.5V operation.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package MSOP-8
Category ADC/DAC/Data Conversion
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VDD 2.7 5.5 V 4
Supply Voltage (serial interface only) VDD 1.8 2.7 V Serial Interface only. 4
VDD Start Voltage to ensure Wiper Reset VBOR 1.65 V RAM retention voltage (VRAM) < VBOR 4
Delay after device exits reset state TBORD 10 20 µs VDD > VBOR 4
Supply Current, serial interface active 3.4 MHz IDD 600 µA Serial Interface Active, HVC/A0 = VIH (or VIL), write all 0's to Volatile Wiper 0, VDD = 5.5V, FSCL = 3.4 MHz 4
Supply Current, serial interface active 100 kHz IDD 250 µA Serial Interface Active, HVC/A0 = VIH (or VIL), write all 0's to Volatile Wiper 0, VDD = 5.5V, FSCL = 100 kHz 4
Supply Current, serial interface inactive IDD 2.5 5 µA Stop condition, SCL = SDA = VIH, Wiper = 0, VDD = 5.5V, HVC/A0 = VIH 4
Resistance (-502 devices) RAB 4 5 6 kΩ -502 devices, ±20% 5
Resistance tolerance RAB -20 20 % -502 devices 5
Wiper Resistance RW 75 160 Ω VDD = 5.5 V, IW = 2.0 mA, code = 00h 5
Wiper Resistance RW 75 300 Ω VDD = 2.7 V, IW = 2.0 mA, code = 00h 5
Nominal Resistance Tempco ΔRAB/ΔT 50 ppm/°C TA = -20°C to +70°C 5
Nominal Resistance Tempco ΔRAB/ΔT 100 ppm/°C TA = -40°C to +85°C 5
Nominal Resistance Tempco ΔRAB/ΔT 150 ppm/°C TA = -40°C to +125°C 5
Ratiometric Tempco ΔVWB/ΔT 15 ppm/°C Code = Midscale (80h or 40h) 5
Resistor Terminal Input Voltage Range VA,VW,VB 0 5.5 V Vss to VDD; Note 5, Note 6 5
Max current through terminal A IT 2.5 mA Terminal A IAW, W = Full-Scale (FS) 6
Max current through terminal B IT 2.5 mA Terminal B IBW, W = Zero Scale (ZS) 6
Max current through terminal W IT 2.5 mA Terminal W IAW or IBW, W = FS or ZS 6
Max current between terminals A and B IAB 1.38 mA VB = 0V, VA = 5.5V, RAB(MIN) = 4000 Ω 6
Leakage current into A, W or B IWL 100 nA MCP4XX1 PxA = PxW = PxB = VSS 6
Full-Scale Error VWFSE -6 -0.1 LSb 5 k 8-bit, 3.0V ≤ VDD ≤ 5.5V 7
Zero-Scale Error VWZSE 0.1 6 LSb 5 k 8-bit, 3.0V ≤ VDD ≤ 5.5V 7
Potentiometer Integral Non-linearity INL -1 0.5 1 LSb 8-bit 3.0V ≤ VDD ≤ 5.5V, MCP4XX1 only (Note 2); typ ±0.5 7
Potentiometer Differential Non-linearity DNL -0.5 0.25 0.5 LSb 8-bit 3.0V ≤ VDD ≤ 5.5V, MCP4XX1 only (Note 2); typ ±0.25 7
Bandwidth -3 dB BW 2 MHz 5 k 8-bit Code = 80h, load = 30 pF 8
Rheostat Integral Non-linearity R-INL -1.5 0.5 1.5 LSb 5 k 8-bit, 5.5V, IW = 900 µA; typ ±0.5 9
Rheostat Integral Non-linearity R-INL -8.25 4.5 8.25 LSb 5 k 8-bit, 3.0V, IW = 480 µA (Note 7) 9
Rheostat Differential Non-linearity R-DNL -0.5 0.25 0.5 LSb 5 k 8-bit, 5.5V, IW = 900 µA; typ ±0.25 10
Rheostat Differential Non-linearity R-DNL -1 0.5 1 LSb 5 k 8-bit, 3.0V, IW = 480 µA (Note 7) 10
Capacitance (PA) CAW 75 pF f =1 MHz, Code = Full-Scale 10
Capacitance (PW) CW 120 pF f =1 MHz, Code = Full-Scale 10
Capacitance (PB) CBW 75 pF f =1 MHz, Code = Full-Scale 10
Schmitt Trigger High Input Threshold (all inputs except SDA/SCL) VIH 0.45 V min 0.45 VDD, 2.7V ≤ VDD ≤ 5.5V 11
Schmitt Trigger High Input Threshold (SDA/SCL) VIH 0.7 12.5 V min 0.7 VDD, max VMAX; 100 kHz to 3.4 MHz 11
Schmitt Trigger Low Input Threshold (all inputs except SDA/SCL) VIL 0.2 V max 0.2VDD, all inputs except SDA and SCL 11
Schmitt Trigger Low Input Threshold (SDA/SCL) VIL -0.5 0.3 V max 0.3VDD, SDA and SCL 11
High Voltage Limit VMAX 12.5 V Pin can tolerate VMAX or less. 11
Output Low Voltage (SDA) VOL 0 0.4 V VDD ≥ 2.0V, IOL = 3 mA 12
Weak Pull-up / Pull-down Current IPU 1.75 mA Internal VDD pull-up, VIHH pull-down, VDD = 5.5V, VIHH = 12.5V 12
HVC pin pull current IPU 170 µA HVC pin, VDD = 5.5V, VHVC = 3V 12
HVC Pull-up/Pull-down Resistance RHVC 16 kΩ VDD = 5.5V, VHVC = 3V 12
Input Leakage Current IIL -1 1 µA VIN = VDD and VIN = VSS 12
Pin Capacitance CIN, COUT 10 pF fC = 3.4 MHz 12
SCL clock frequency, Standard Mode FSCL 0 100 kHz Cb = 400 pF, 1.8V - 5.5V 13
SCL clock frequency, Fast Mode FSCL 0 400 kHz Cb = 400 pF, 2.7V - 5.5V 13
SCL clock frequency, High-Speed 1.7 FSCL 0 1.7 MHz Cb = 400 pF, 4.5V - 5.5V 13
SCL clock frequency, High-Speed 3.4 FSCL 0 3.4 MHz Cb = 100 pF, 4.5V - 5.5V 13
Voltage on VDD with respect to VSS VDD -0.6 7 V 3
Voltage on HVC/A0, A1, A2, SCL, SDA with respect to VSS -0.6 12.5 V 3
Voltage on PxA, PxW, PxB with respect to VSS -0.3 V -0.3V to VDD + 0.3V 3
Input clamp current IIK -20 20 mA VI < 0, VI > VDD, VI > VPP on HV pins 3
Output clamp current IOK -20 20 mA VO < 0 or VO > VDD 3
Maximum current into PXA, PXW & PXB pins -2.5 2.5 mA 3
Maximum current into VDD pin 100 mA 3
Maximum current out of VSS pin 100 mA 3
Storage temperature -65 150 °C 3
Ambient temperature with power applied -40 125 °C 3
Maximum Junction Temperature TJ 150 °C 3
Operating Temperature Range TA -40 125 °C 16
Thermal Resistance, 8L-MSOP θJA 211 °C/W 16

CAD (KiCad official)

  • Symbol: MCP4551T-502E
  • Footprint: Package_SO:MSOP-8_3x3mm_P0.65mm
  • 3D model: MSOP-8 (KiCad packages3D, STEP)
  • 3D model files: mcp4551t-502e-etched.step / mcp4551t-502e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp4551t-502e.step / mcp4551t-502e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (102 pp, sha256 ee77464c39584a73, retrieved 2026-10-22, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF