main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 7d ago
viewers mcp4531t-502e: viewers · Ray 7d ago
mcp4531t-502e-etched.glb Publish 0.1.0 · Ray 7d ago
mcp4531t-502e-etched.step mcp4531t-502e: factory component page (tier=mfr) · Ray 7d ago
mcp4531t-502e-hero.glb mcp4531t-502e: hero GLB from the etched model (keeps the MPN mark) · Ray 7d ago
mcp4531t-502e-hero.overlay.json Publish 0.1.0 · Ray 7d ago
mcp4531t-502e.glb Publish 0.1.0 · Ray 7d ago
mcp4531t-502e.kicad_mod Publish 0.1.0 · Ray 7d ago
mcp4531t-502e.kicad_sym Publish 0.1.0 · Ray 7d ago
mcp4531t-502e.lbr Publish 0.1.0 · Ray 7d ago
mcp4531t-502e.step Publish 0.1.0 · Ray 7d ago
package.json Publish 0.1.0 · Ray 7d ago
page.json Set visibility: public · Ray 7d ago
README.md Publish 0.1.0 · Ray 7d ago
verification.json Verified: Published by the parts factory: tier mfr, 8 pins · Ray 7d ago

MCP4531T-502E

Microchip Tech · Digital Potentiometers · MSOP-8

MCP4531T-502E from Microchip Tech, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 HVC/A0 input Address 0 input for the I2C interface, latched at POR/BOR, and also the high-voltage command pin (normal command vs. high-voltage command when driven to VIHH); digital inputs are high-voltage tolerant up to 12.5V with Schmitt-trigger input.
2 SCL input I2C serial clock input that accepts only external clock signals from the host controller; the input is high-voltage tolerant with Schmitt trigger.
3 SDA bidirectional I2C serial data I/O implemented as an open-drain N-channel driver.
4 VSS power_in Device ground reference.
5 P0A passive Potentiometer 0 Terminal A, fixed connection to the full-scale wiper value (0x80 for 7-bit devices); the voltage must be between VSS and VDD and it can carry positive or negative current.
6 P0W passive Potentiometer 0 wiper terminal, the adjustable terminal of the digital potentiometer; the voltage must be between VSS and VDD and it can carry positive or negative current.
7 P0B passive Potentiometer 0 Terminal B, fixed connection to the zero-scale wiper value (0x00); the voltage must be between VSS and VDD and it can carry positive or negative current.
8 VDD power_in Positive power supply input referenced to VSS; electrical performance may not meet data sheet specifications while VDD is below 2.7V.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package MSOP-8
Category ADC/DAC/Data Conversion
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Nominal resistance RAB (-502 device) RAB 4 5 6 kΩ -502 devices (Note 1) 5
RAB resistance tolerance RAB -20 20 % Printed (±20%), -502 devices 5
Supply voltage (device characteristics specified) VDD 2.7 5.5 V 4
Supply voltage (device operation, serial interface only) VDD 1.8 2.7 V Serial interface only 4
Voltage on VDD with respect to VSS VDD -0.6 7 V 3
Voltage on HVC/A0, A1, A2, SCL, SDA with respect to VSS -0.6 12.5 V 3
Ambient temperature with power applied TA -40 125 °C 3
Storage temperature -65 150 °C 3
Maximum junction temperature TJ 150 °C 3
Maximum current into VDD pin 100 mA 3
Specified / operating temperature range (extended) TA -40 125 °C Extended temperature range 16
HVC pin voltage range VHV 12.5 V VDD ≥ 4.5V 4
VDD start voltage to ensure wiper reset (BOR) VBOR 1.65 V RAM retention voltage (VRAM) < VBOR 4
Delay after device exits reset state TBORD 10 20 µs VDD > VBOR 4
Supply current, serial interface active IDD 600 µA Serial interface active, HVC/A0 = VIH (or VIL), write all 0's to volatile wiper 0, VDD = 5.5V, FSCL = 3.4 MHz 4
Supply current, serial interface active 250 µA Serial interface active, HVC/A0 = VIH (or VIL), write all 0's to volatile wiper 0, VDD = 5.5V, FSCL = 100 kHz 4
Supply current, serial interface inactive 2.5 5 µA Stop condition, SCL = SDA = VIH, wiper = 0, VDD = 5.5V, HVC/A0 = VIH 4
Maximum current through terminal A (IAW) IT 2.5 mA Terminal A IAW, W = Full-Scale (FS) 6
Maximum current through terminal B (IBW) IT 2.5 mA Terminal B IBW, W = Zero Scale (ZS) 6
Maximum current through terminal W IT 2.5 mA Terminal W IAW or IBW, W = FS or ZS 6
Maximum current through terminal A and B (5k, RAB(MIN)=4000) IAB 1.38 mA IAB, VB = 0V, VA = 5.5V, RAB(MIN) = 4000 6
Wiper resistance RW RW 75 160 Ω VDD = 5.5V, IW = 2.0 mA, code = 00h 5
Wiper resistance RW RW 75 300 Ω VDD = 2.7V, IW = 2.0 mA, code = 00h 5
Full-scale error (MCP4XX1), 5k 7-bit VWFSE -4 -0.1 LSb 5k, 7-bit, 3.0V ≤ VDD ≤ 5.5V 7
Zero-scale error (MCP4XX1), 5k 7-bit VWZSE 0.1 3 LSb 5k, 7-bit, 3.0V ≤ VDD ≤ 5.5V 7
Potentiometer integral non-linearity (7-bit) INL -0.5 0.25 0.5 LSb 7-bit, MCP4XX1 devices only (Note 2) 7
Potentiometer differential non-linearity (7-bit) DNL -0.25 0.125 0.25 LSb 7-bit, MCP4XX1 devices only (Note 2) 7
Rheostat integral non-linearity, 5k 7-bit R-INL -1.125 0.5 1.125 LSb 5k, 7-bit, 5.5V, IW = 900 µA 9
Rheostat integral non-linearity, 5k 7-bit R-INL -6 4.5 6 LSb 5k, 7-bit, 3.0V, IW = 480 µA (Note 7) 9
Rheostat differential non-linearity, 5k 7-bit R-DNL -0.375 0.25 0.375 LSb 5k, 7-bit, 5.5V, IW = 900 µA 10
Rheostat differential non-linearity, 5k 7-bit R-DNL -0.75 0.5 0.75 LSb 5k, 7-bit, 3.0V, IW = 480 µA (Note 7) 10
Schmitt trigger high input threshold VIH 0.45 x VDD All inputs except SDA and SCL, 2.7V ≤ VDD ≤ 5.5V 11
Schmitt trigger high input threshold VIH 0.5 x VDD All inputs except SDA and SCL, 1.8V ≤ VDD ≤ 2.7V 11
Schmitt trigger high input threshold VIH 0.7 x VDD SDA and SCL, 100 kHz 11
Schmitt trigger low input threshold VIL 0.2 x VDD All inputs except SDA and SCL 11
High voltage limit VMAX 12.5 V Pin can tolerate VMAX or less 11
Output low voltage (SDA) VOL 0.2 x VDD VDD < 2.0V, IOL = 1 mA 12
Output low voltage (SDA) VOL 0.4 V VDD ≥ 2.0V, IOL = 3 mA 12
Weak pull-up / pull-down current IPU 1.75 mA Internal VDD pull-up, VIHH pull-down, VDD = 5.5V, VIHH = 12.5V 12
Input leakage current IIL -1 1 µA VIN = VDD and VIN = VSS 12
I2C SCL clock frequency, standard mode FSCL 0 100 kHz Standard mode, Cb = 400 pF, 1.8V - 5.5V 13
I2C SCL clock frequency, fast mode FSCL 0 400 kHz Fast mode, Cb = 400 pF, 2.7V - 5.5V 13
I2C SCL clock frequency, high-speed 1.7 FSCL 0 1.7 MHz High-speed 1.7, Cb = 400 pF, 4.5V - 5.5V 13
I2C SCL clock frequency, high-speed 3.4 FSCL 0 3.4 MHz High-speed 3.4, Cb = 100 pF, 4.5V - 5.5V 13
Nominal resistance tempco RAB/T 50 ppm/°C TA = -20°C to +70°C 5
Nominal resistance tempco RAB/T 100 ppm/°C TA = -40°C to +85°C 5
Nominal resistance tempco RAB/T 150 ppm/°C TA = -40°C to +125°C 5
Ratiometric tempco VWB/T 15 ppm/°C Code = Midscale (80h or 40h) 5
Thermal resistance, 8L-MSOP JA 211 °C/W 8L-MSOP 16

CAD (KiCad official)

  • Symbol: MCP4531T-502E
  • Footprint: Package_SO:MSOP-8_3x3mm_P0.65mm
  • 3D model: MSOP-8 (KiCad packages3D, STEP)
  • 3D model files: mcp4531t-502e-etched.step / mcp4531t-502e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp4531t-502e.step / mcp4531t-502e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (102 pp, sha256 ee77464c39584a73, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF