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MCP4462-104E
Public Made by Adomby adom
Microchip Tech Digital Potentiometers, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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MCP4462-104E
Microchip Tech · Digital Potentiometers · TSSOP-14
MCP4462-104E from Microchip Tech, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P3W | passive | Potentiometer 3 wiper terminal; its voltage must be between VSS and VDD and it can carry positive or negative current. |
| 2 | P3B | passive | Potentiometer 3 terminal B, the zero-scale connection for wiper value 0x00; its voltage must be between VSS and VDD and it can carry positive or negative current. |
| 3 | HVC/A0 | input | I2C address bit 0 latched at POR/BOR, and High Voltage Command pin when driven to VIHH; a high-voltage tolerant Schmitt-trigger input. |
| 4 | SCL | input | I2C serial clock input, which accepts only external clock signals as a slave; a high-voltage tolerant Schmitt-trigger input. |
| 5 | SDA | bidirectional | I2C serial data I/O implemented as an open-drain N-channel driver; a high-voltage tolerant Schmitt-trigger input. |
| 6 | VSS | power_in | Device ground reference. |
| 7 | P1B | passive | Potentiometer 1 terminal B, the zero-scale connection for wiper value 0x00; its voltage must be between VSS and VDD and it can carry positive or negative current. |
| 8 | P1W | passive | Potentiometer 1 wiper terminal; its voltage must be between VSS and VDD and it can carry positive or negative current. |
| 9 | P0W | passive | Potentiometer 0 wiper terminal; its voltage must be between VSS and VDD and it can carry positive or negative current. |
| 10 | P0B | passive | Potentiometer 0 terminal B, the zero-scale connection for wiper value 0x00; its voltage must be between VSS and VDD and it can carry positive or negative current. |
| 11 | A1 | input | I2C address bit 1 input that, together with A0, completes the device address; a high-voltage tolerant Schmitt-trigger input. |
| 12 | VDD | power_in | Positive power supply input relative to VSS; electrical performance may not meet data sheet specifications while VDD is below 2.7V. |
| 13 | P2B | passive | Potentiometer 2 terminal B, the zero-scale connection for wiper value 0x00; its voltage must be between VSS and VDD and it can carry positive or negative current. |
| 14 | P2W | passive | Potentiometer 2 wiper terminal; its voltage must be between VSS and VDD and it can carry positive or negative current. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TSSOP-14 |
| Category | ADC/DAC/Data Conversion |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| RAB resistance tolerance | -20 | 20 | % | Resistance (± 20%), RAB, -104 devices | 5 | ||
| End-to-end resistance RAB | RAB | 80 | 100 | 120 | kΩ | -104 devices (Note 1) | 5 |
| Nominal resistance match RAB | (/RABWC - RABMEAN/)/RABMEAN | 0.2 | 1 | % | 100 kΩ | 5 | |
| Nominal resistance match RBW | (/RBWWC - RBWMEAN/)/RBWMEAN | 0.25 | 1.25 | % | 100 kΩ, Code = Full Scale | 5 | |
| Wiper Resistance | RW | 75 | 160 | Ω | VDD = 5.5 V, IW = 2.0 mA, code = 00h | 5 | |
| Wiper Resistance | RW | 75 | 300 | Ω | VDD = 2.7 V, IW = 2.0 mA, code = 00h | 5 | |
| Maximum current through terminal A | IW | 2.5 | mA | Terminal A IAW, W = Full Scale (FS) | 6 | ||
| Maximum current through terminal B | IW | 2.5 | mA | Terminal B IBW, W = Zero Scale (ZS) | 6 | ||
| Maximum current through terminal W | IW | 2.5 | mA | Terminal W IAW (W = FS) or IBW (W = ZS) | 6 | ||
| Maximum RAB current | IAB | 0.069 | mA | VB = 0V, VA = 5.5V, RAB(MIN) = 80000Ω | 6 | ||
| Rheostat integral non-linearity 8-bit 5.5V | R-INL | -1 | 0.5 | 1 | LSb | 100 kΩ 8-bit 5.5V, IW = 45 µA | 8 |
| Rheostat integral non-linearity 8-bit 3.0V | R-INL | -1.5 | 0.25 | 1.5 | LSb | 100 kΩ 8-bit 3.0V, IW = 24 µA (Note 7) | 8 |
| Rheostat differential non-linearity 8-bit 5.5V | R-DNL | -0.5 | 0.25 | 0.5 | LSb | 100 kΩ 8-bit 5.5V, IW = 45 µA | 9 |
| Rheostat differential non-linearity 8-bit 3.0V | R-DNL | -0.5 | 0.25 | 0.5 | LSb | 100 kΩ 8-bit 3.0V, IW = 24 µA (Note 7) | 9 |
| Supply voltage | VDD | 2.7 | 5.5 | V | 4 | ||
| Supply voltage serial interface only | VDD | 1.8 | 2.7 | V | Serial Interface only | 4 | |
| VDD start voltage to ensure wiper reset | VBOR | 1.65 | V | RAM retention voltage (VRAM) < VBOR | 4 | ||
| Supply current serial interface active 3.4 MHz | IDD | 600 | µA | Serial Interface Active, HVC/A0 = VIH (or VIL) (Note 11), write all 0's to volatile Wiper 0, VDD = 5.5V, FSCL @ 3.4 MHz | 4 | ||
| Supply current serial interface active 100 kHz | IDD | 250 | µA | Serial Interface Active, HVC/A0 = VIH (or VIL) (Note 11), write all 0's to volatile Wiper 0, VDD = 5.5V, FSCL @ 100 kHz | 4 | ||
| EE write current | IWRITE | 575 | µA | EE Write Current (Write Cycle), VDD = 5.5V, FSCL = 400 kHz, write all 0's to nonvolatile Wiper 0, SCL = VIL or VIH | 4 | ||
| Serial interface inactive supply current | IDD | 2.5 | 5 | µA | Serial Interface Inactive (Stop condition, SCL = SDA = VIH), Wiper = 0, VDD = 5.5V, HVC/A0 = VIH | 4 | |
| High voltage input entry voltage | VIHHEN | 9 | 12.5 | V | Threshold for WiperLock Technology | 10 | |
| High voltage limit | VMAX | 12.5 | V | Pin can tolerate VMAX or less | 10 | ||
| Output low voltage (SDA) | VOL | 0.4 | V | VDD ≥ 2.0V, IOL = 3 mA | 10 | ||
| Weak pull-up current | IPU | 1.75 | mA | Internal VDD pull-up, VIHH pull-down, VDD = 5.5V, VHVC = 12.5V | 11 | ||
| Input leakage current | IIL | -1 | 1 | µA | VIN = VDD (all pins) and VIN = VSS (all pins except RESET) | 11 | |
| Leakage current into A, W or B | IWL | 100 | nA | MCP44X2 PxB = PxW = VSS | 6 | ||
| EEPROM programming write cycle time | tWC | 3 | 10 | ms | 11 | ||
| RESET pulse width | tRST | 50 | ns | 12 | |||
| RESET rising edge normal mode | tRSTD | 20 | ns | Wiper driving and I2C interface operational | 12 | ||
| I2C clock frequency standard mode | FSCL | 0 | 100 | kHz | Cb = 400 pF, 1.8V - 5.5V | 12 | |
| I2C clock frequency fast mode | FSCL | 0 | 400 | kHz | Cb = 400 pF, 2.7V - 5.5V | 12 | |
| I2C clock frequency high-speed 3.4 MHz | FSCL | 0 | 3.4 | MHz | Cb = 100 pF, 4.5V - 5.5V | 12 | |
| Voltage on VDD with respect to VSS | VDD | -0.6 | 7 | V | Voltage on VDD with respect to VSS | 3 | |
| Voltage on HVC/A0, A1, SCL, SDA, WP, RESET | -0.6 | 12.5 | V | With respect to VSS | 3 | ||
| Maximum output current sunk by any output pin | 25 | mA | 3 | ||||
| Maximum output current sourced by any output pin | 25 | mA | 3 | ||||
| Maximum current into PXA, PXW and PXB pins | -2.5 | 2.5 | mA | 3 | |||
| Maximum current out of VSS pin | 100 | mA | 3 | ||||
| Maximum current into VDD pin | 100 | mA | 3 | ||||
| Storage temperature | -65 | 150 | °C | 3 | |||
| Ambient temperature with power applied | TA | -40 | 125 | °C | With power applied | 3 | |
| Maximum junction temperature | TJ | 150 | °C | 3 | |||
| Specified and operating temperature range | TA | -40 | 125 | °C | Extended | 17 | |
| Thermal resistance 14L-TSSOP | θJA | 100 | °C/W | 17 | |||
| Nominal resistance tempco | ΔRAB/ΔT | 50 | ppm/°C | TA = -20°C to +70°C | 5 | ||
| Nominal resistance tempco | ΔRAB/ΔT | 100 | ppm/°C | TA = -40°C to +85°C | 5 | ||
| Nominal resistance tempco | ΔRAB/ΔT | 150 | ppm/°C | TA = -40°C to +125°C | 5 | ||
| Ratiometric tempco | ΔVWB/ΔT | 15 | ppm/°C | Code = Midscale (80h or 40h) | 5 | ||
| Bandwidth -3 dB 100 kΩ | BW | 100 | kHz | 100 kΩ 8-bit Code = 80h, load = 30 pF | 7 | ||
| Capacitance PA | CAW | 75 | pF | f = 1 MHz, Code = Full Scale | 9 | ||
| Capacitance PW | CW | 120 | pF | f = 1 MHz, Code = Full Scale | 9 | ||
| Capacitance PB | CBW | 75 | pF | f = 1 MHz, Code = Full Scale | 9 | ||
| Pin capacitance | CIN, COUT | 10 | pF | fC = 20 MHz | 11 | ||
| RHVC pull-up/pull-down resistance | RHVC | 16 | kΩ | VDD = 5.5V, VHVC = 3V | 11 |
CAD (KiCad official)
- Symbol:
MCP4462-104E - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
mcp4462-104e-etched.step/mcp4462-104e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp4462-104e.step/mcp4462-104e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (100 pp, sha256
c64d93992e9b7079, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).