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MCP4461-103E
Public Made by Adomby adom
Microchip Tech Digital Potentiometers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMCP4461-103E
Microchip Tech · Digital Potentiometers · TSSOP-20
MCP4461-103E from Microchip Tech, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P3A | passive | Potentiometer 3 Terminal A, the full-scale end of the resistor network, with voltage that must be between VSS and VDD. |
| 2 | P3W | passive | Potentiometer 3 wiper terminal, which can carry positive or negative current and must stay between VSS and VDD. |
| 3 | P3B | passive | Potentiometer 3 Terminal B, the zero-scale end (wiper value 0x00), with voltage that must be between VSS and VDD. |
| 4 | HVC/A0 | input | High-voltage-tolerant input that serves as I2C Address 0 (latched at POR/BOR) and as the High Voltage Command pin when driven to VIHH. |
| 5 | SCL | input | I2C serial clock input, high-voltage tolerant with Schmitt trigger, connected to the host SCL; the device is a slave and accepts only external clocks. |
| 6 | SDA | bidirectional | I2C serial data input/output with an open-drain N-channel driver, high-voltage tolerant with Schmitt trigger. |
| 7 | VSS | power_in | Device ground reference. |
| 8 | P1B | passive | Potentiometer 1 Terminal B, the zero-scale end, with voltage that must be between VSS and VDD. |
| 9 | P1W | passive | Potentiometer 1 wiper terminal, which can carry positive or negative current and must stay between VSS and VDD. |
| 10 | P1A | passive | Potentiometer 1 Terminal A, the full-scale end, with voltage that must be between VSS and VDD. |
| 11 | P0A | passive | Potentiometer 0 Terminal A, the full-scale end, with voltage that must be between VSS and VDD. |
| 12 | P0W | passive | Potentiometer 0 wiper terminal, which can carry positive or negative current and must stay between VSS and VDD. |
| 13 | P0B | passive | Potentiometer 0 Terminal B, the zero-scale end, with voltage that must be between VSS and VDD. |
| 14 | WP | input | Hardware EEPROM write protect input, high-voltage tolerant with Schmitt trigger and a smart pull-up that shuts off while the pin is forced low. |
| 15 | RESET | input | Hardware reset input that forces the device into the POR/BOR state; high-voltage tolerant with Schmitt trigger and a weak pull-up. |
| 16 | A1 | input | I2C Address 1 input, high-voltage tolerant with smart pull-up; together with A0 it allows up to 4 devices on one I2C bus. |
| 17 | VDD | power_in | Positive power supply input relative to VSS; 2.7V to 5.5V specified, device performance may not meet specifications below 2.7V. |
| 18 | P2B | passive | Potentiometer 2 Terminal B, the zero-scale end, with voltage that must be between VSS and VDD. |
| 19 | P2W | passive | Potentiometer 2 wiper terminal, which can carry positive or negative current and must stay between VSS and VDD. |
| 20 | P2A | passive | Potentiometer 2 Terminal A, the full-scale end, with voltage that must be between VSS and VDD. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TSSOP-20 |
| Category | ADC/DAC/Data Conversion |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Nominal resistance RAB (-103, 10kΩ, ±20%) | RAB | 8 | 10 | 12 | kΩ | -103 devices (Note 1) | 5 |
| Supply Voltage | VDD | 2.7 | 5.5 | V | 4 | ||
| Supply Voltage (serial interface only) | VDD | 1.8 | 2.7 | V | Serial Interface only | 4 | |
| HV pin voltage range | VHV | 0 | 12.5 | V | VDD >= 4.5V; min is VSS | 4 | |
| VDD start voltage for wiper reset | VBOR | 1.65 | V | RAM retention voltage (VRAM) < VBOR | 4 | ||
| Delay after exit from reset | TBORD | 10 | 20 | µs | VDD > VBOR | 4 | |
| Supply current, serial active 3.4 MHz | IDD | 600 | µA | Serial Interface Active, write all 0's to volatile Wiper 0, VDD = 5.5V, FSCL @ 3.4 MHz | 4 | ||
| Supply current, serial active 100 kHz | IDD | 250 | µA | Serial Interface Active, VDD = 5.5V, FSCL @ 100 kHz | 4 | ||
| EE write current | IDD | 575 | µA | EE Write Current, VDD = 5.5V, FSCL = 400 kHz, write all 0's to nonvolatile Wiper 0 | 4 | ||
| Serial interface inactive current | IDD | 2.5 | 5 | µA | Stop condition, SCL = SDA = VIH, Wiper = 0, VDD = 5.5V, HVC/A0 = VIH | 4 | |
| Nominal resistance match 10 kΩ | (/RABWC - RABMEAN/)/RABMEAN | 0.2 | 1.25 | % | 10 kΩ MCP44X1 devices only | 5 | |
| RBW match 10 kΩ | (/RBWWC - RBWMEAN/)/RBWMEAN | 0.25 | 1.5 | % | 10 kΩ, Code = Full Scale | 5 | |
| Wiper resistance | RW | 75 | 160 | Ω | VDD = 5.5 V, IW = 2.0 mA, code = 00h | 5 | |
| Wiper resistance | RW | 75 | 300 | Ω | VDD = 2.7 V, IW = 2.0 mA, code = 00h | 5 | |
| Nominal resistance tempco | ΔRAB/ΔT | 50 | ppm/°C | TA = -20°C to +70°C | 5 | ||
| Nominal resistance tempco | ΔRAB/ΔT | 100 | ppm/°C | TA = -40°C to +85°C | 5 | ||
| Nominal resistance tempco | ΔRAB/ΔT | 150 | ppm/°C | TA = -40°C to +125°C | 5 | ||
| Ratiometric tempco | ΔVWB/ΔT | 15 | ppm/°C | Code = Midscale (80h or 40h) | 5 | ||
| Resistor terminal input voltage range | VA,VW,VB | 0 | 5.5 | V | VSS to VDD; Note 5, Note 6 | 6 | |
| Maximum current through A, W or B | IW | 2.5 | mA | Terminal W / A / B | 6 | ||
| Maximum RAB current | IAB | 0.688 | mA | VB = 0V, VA = 5.5V, RAB(MIN) = 8000Ω | 6 | ||
| Leakage current into A, W or B | IWL | 100 | nA | MCP44X1 PxA = PxW = PxB = VSS | 6 | ||
| Full scale error 10 kΩ 8-bit | VWFSE | -3.5 | -0.1 | LSb | 10 kΩ 8-bit 3.0V ≤ VDD ≤ 5.5V | 7 | |
| Zero scale error 10 kΩ 8-bit | VWZSE | 0.1 | 3.5 | LSb | 10 kΩ 8-bit 3.0V ≤ VDD ≤ 5.5V | 7 | |
| Potentiometer INL 8-bit | INL | -1 | 0.5 | 1 | LSb | 8-bit 3.0V ≤ VDD ≤ 5.5V, MCP44X1 only (Note 2) | 7 |
| Potentiometer DNL 8-bit | DNL | -0.5 | 0.25 | 0.5 | LSb | 8-bit 3.0V ≤ VDD ≤ 5.5V, MCP44X1 only (Note 2) | 7 |
| Bandwidth -3 dB 10 kΩ 8-bit | BW | 1 | MHz | 10 kΩ 8-bit Code = 80h, load = 30 pF | 7 | ||
| Capacitance PA | CAW | 75 | pF | f = 1 MHz, Code = Full Scale | 9 | ||
| Capacitance PW | CW | 120 | pF | f = 1 MHz, Code = Full Scale | 9 | ||
| Capacitance PB | CBW | 75 | pF | f = 1 MHz, Code = Full Scale | 9 | ||
| Schmitt trigger high input threshold (except SDA/SCL) | VIH | 0.45 | V | 2.7V ≤ VDD ≤ 5.5V; min is 0.45 VDD | 10 | ||
| Schmitt trigger low input threshold (except SDA/SCL) | VIL | 0.2 | V | All inputs except SDA and SCL; max is 0.2 VDD | 10 | ||
| High voltage input entry voltage | VIHHEN | 9 | 12.5 | V | Threshold for WiperLock Technology (Note 6) | 10 | |
| High voltage limit | VMAX | 12.5 | V | Pin can tolerate VMAX or less (Note 6) | 10 | ||
| Output low voltage SDA | VOL | 0.4 | V | VDD ≥ 2.0V, IOL = 3 mA | 10 | ||
| Input leakage current | IIL | -1 | 1 | µA | VIN = VDD (all pins) and VIN = VSS (all pins except RESET) | 11 | |
| Pin capacitance | CIN, COUT | 10 | pF | fC = 20 MHz | 11 | ||
| EEPROM write cycle time | tWC | 3 | 10 | ms | 11 | ||
| Power supply sensitivity 8-bit | PSS | 0.0015 | 0.0035 | %/% | VDD = 2.7V to 5.5V, VA = 2.7V, Code = 80h | 11 | |
| RESET pulse width | tRST | 50 | ns | 12 | |||
| RESET rising edge normal mode | tRSTD | 20 | ns | 12 | |||
| SCL frequency, standard mode | FSCL | 0 | 100 | kHz | Cb = 400 pF, 1.8V - 5.5V | 13 | |
| SCL frequency, fast mode | FSCL | 0 | 400 | kHz | Cb = 400 pF, 2.7V - 5.5V | 13 | |
| SCL frequency, high-speed 3.4 | FSCL | 0 | 3.4 | MHz | Cb = 100 pF, 4.5V - 5.5V | 13 | |
| Clock high time 400 kHz | THIGH | 600 | ns | 400 kHz mode, 2.7V-5.5V | 14 | ||
| Clock low time 400 kHz | TLOW | 1300 | ns | 400 kHz mode, 2.7V-5.5V | 14 | ||
| Output valid from clock 400 kHz | TAA | 900 | ns | 400 kHz mode | 16 | ||
| Operating temperature range | TA | -40 | 125 | °C | 17 | ||
| Storage temperature range | TA | -65 | 150 | °C | 17 | ||
| Thermal resistance, 20L-TSSOP | θJA | 90 | °C/W | 17 | |||
| Voltage on VDD wrt VSS | VDD | -0.6 | 7 | V | 3 | ||
| Voltage on HVC/A0, A1, SCL, SDA, WP, RESET wrt VSS | -0.6 | 12.5 | V | 3 | |||
| Maximum current into PxA, PxW, PxB pins | -2.5 | 2.5 | mA | 3 | |||
| Maximum junction temperature | TJ | 150 | °C | 3 |
CAD (KiCad official)
- Symbol:
MCP4461-103E - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
mcp4461-103e-etched.step/mcp4461-103e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp4461-103e.step/mcp4461-103e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (100 pp, sha256
c64d93992e9b7079, retrieved 2026-10-31, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).