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MCP4441-103E
Public Made by Adomby adom
Microchip Tech Digital Potentiometers, QFN-20-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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MCP4441-103E
Microchip Tech · Digital Potentiometers · QFN-20-EP(4x4)
MCP4441-103E from Microchip Tech, in a QFN-20-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P3B | passive | Potentiometer 3 terminal B is the fixed connection to the zero-scale wiper value (0x00); its voltage must be between VSS and VDD and it can carry positive and negative current. |
| 2 | HVC/A0 | input | Address 0 input for the I2C interface, latched at POR/BOR, and the High Voltage Command pin (a VIHH level selects a high-voltage command); the input is high-voltage tolerant with a Schmitt trigger. |
| 3 | SCL | input | I2C serial clock input connected to the host controller; the device is a slave that accepts only external clock signals, with a high-voltage tolerant Schmitt-trigger input. |
| 4 | SDA | bidirectional | I2C serial data I/O implemented as an open-drain N-channel driver, with a high-voltage tolerant Schmitt-trigger input. |
| 5 | VSS | power_in | Device ground reference; the VDD supply and all terminal voltages are referenced to this pin. |
| 6 | P1B | passive | Potentiometer 1 terminal B is the fixed connection to the zero-scale wiper value (0x00); its voltage must be between VSS and VDD and it can carry positive and negative current. |
| 7 | P1W | passive | Potentiometer 1 wiper terminal is the adjustable tap of the digital potentiometer; its voltage must be between VSS and VDD and it can carry positive and negative current. |
| 8 | P1A | passive | Potentiometer 1 terminal A is connected to the full-scale wiper value (0x100 for 8-bit or 0x80 for 7-bit devices); its voltage must be between VSS and VDD and it can carry positive and negative current. |
| 9 | P0A | passive | Potentiometer 0 terminal A is connected to the full-scale wiper value (0x100 for 8-bit or 0x80 for 7-bit devices); its voltage must be between VSS and VDD and it can carry positive and negative current. |
| 10 | P0W | passive | Potentiometer 0 wiper terminal is the adjustable tap of the digital potentiometer; its voltage must be between VSS and VDD and it can carry positive and negative current. |
| 11 | P0B | passive | Potentiometer 0 terminal B is the fixed connection to the zero-scale wiper value (0x00); its voltage must be between VSS and VDD and it can carry positive and negative current. |
| 12 | WP | input | Hardware EEPROM write-protect input that forces the nonvolatile memory to be write protected; it is a high-voltage tolerant input with a Schmitt trigger. |
| 13 | RESET | input | Hardware reset input that forces the device into the POR/BOR state; it is a high-voltage tolerant Schmitt-trigger input with a weak pull-up. |
| 14 | A1 | input | I2C Address 1 input which, together with A0, sets the device address so up to 4 MCP44XX devices can share one bus; it is a high-voltage tolerant input whose smart pull-up shuts off while the pin is forced low. |
| 15 | VDD | power_in | Positive power supply input referenced to VSS; electrical performance may not meet the datasheet specifications while VDD is below 2.7V (Vmin). |
| 16 | P2B | passive | Potentiometer 2 terminal B is the fixed connection to the zero-scale wiper value (0x00); its voltage must be between VSS and VDD and it can carry positive and negative current. |
| 17 | P2W | passive | Potentiometer 2 wiper terminal is the adjustable tap of the digital potentiometer; its voltage must be between VSS and VDD and it can carry positive and negative current. |
| 18 | P2A | passive | Potentiometer 2 terminal A is connected to the full-scale wiper value (0x100 for 8-bit or 0x80 for 7-bit devices); its voltage must be between VSS and VDD and it can carry positive and negative current. |
| 19 | P3A | passive | Potentiometer 3 terminal A is connected to the full-scale wiper value (0x100 for 8-bit or 0x80 for 7-bit devices); its voltage must be between VSS and VDD and it can carry positive and negative current. |
| 20 | P3W | passive | Potentiometer 3 wiper terminal is the adjustable tap of the digital potentiometer; its voltage must be between VSS and VDD and it can carry positive and negative current. |
| 21 | EP | passive | Exposed pad conductively connected to the die substrate; it should be tied to the same potential as VSS or left unconnected, and it can serve as a heat sink when attached to a PCB heat sink. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | QFN-20-EP(4x4) |
| Category | ADC/DAC/Data Conversion |
| Pins | 21 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Resistance RAB (-103 device, 10 kΩ) | RAB | 8 | 10 | 12 | kΩ | -103 devices (Note 1) | 5 |
| Resistance tolerance (RAB) | -20 | 20 | % | Resistance (± 20%) | 5 | ||
| Nominal resistance match | (/RABWC - RABMEAN/) / RABMEAN | 0.2 | 1.25 | % | 10 kΩ | 5 | |
| Ratiometric (wiper) resistance match | (/RBWWC - RBWMEAN/) / RBWMEAN | 0.25 | 1.5 | % | 10 kΩ | 5 | |
| Absolute max: voltage on VDD with respect to VSS | VDD | -0.6 | 7 | V | with respect to VSS | 3 | |
| Absolute max: voltage on HVC/A0, A1, SCL, SDA, WP, RESET | -0.6 | 12.5 | V | with respect to VSS | 3 | ||
| Absolute max: voltage on PxA, PxW, PxB pins | -0.3 | V | with respect to VSS; printed maximum is VDD + 0.3V | 3 | |||
| Absolute max: input clamp current | IIK | -20 | 20 | mA | VI < 0, VI > VDD, VI > VPP ON HV pins | 3 | |
| Absolute max: output clamp current | IOK | -20 | 20 | mA | VO < 0 or VO > VDD | 3 | |
| Absolute max: output current sunk by any output pin | 25 | mA | 3 | ||||
| Absolute max: output current sourced by any output pin | 25 | mA | 3 | ||||
| Absolute max: current out of VSS pin | 100 | mA | 3 | ||||
| Absolute max: current into VDD pin | 100 | mA | 3 | ||||
| Absolute max: current into PxA, PxW, PxB pins | -2.5 | 2.5 | mA | 3 | |||
| Absolute max: storage temperature | -65 | 150 | °C | 3 | |||
| Absolute max: ambient temperature with power applied | -40 | 125 | °C | 3 | |||
| Absolute max: soldering temperature of leads (10 s) | 300 | °C | 10 seconds | 3 | |||
| Absolute max: maximum junction temperature | TJ | 150 | °C | 3 | |||
| Operating temperature range | TA | -40 | 125 | °C | 17 | ||
| Supply voltage | VDD | 2.7 | 5.5 | V | 4 | ||
| Supply voltage, device operation (serial interface only) | VDD | 1.8 | 2.7 | V | Serial Interface only. | 4 | |
| HVC/A0, SDA, SCL, A1, WP, RESET voltage range | VHV | 12.5 | V | VDD ≥ 4.5V | 4 | ||
| VDD start voltage to ensure wiper reset | VBOR | 1.65 | V | RAM retention voltage (VRAM) < VBOR | 4 | ||
| Delay after device exits reset state | TBORD | 10 | 20 | µs | VDD > VBOR | 4 | |
| Supply current, serial interface active at 3.4 MHz | IDD | 600 | µA | Serial Interface Active, HVC/A0 = VIH (or VIL), write all 0's to volatile Wiper 0, VDD = 5.5V, FSCL @ 3.4 MHz | 4 | ||
| Supply current, serial interface active at 100 kHz | IDD | 250 | µA | Serial Interface Active, HVC/A0 = VIH (or VIL), write all 0's to volatile Wiper 0, VDD = 5.5V, FSCL @ 100 kHz | 4 | ||
| EE write current (write cycle, nonvolatile device) | 575 | µA | Write Cycle (Nonvolatile device only), VDD = 5.5V, FSCL = 400 kHz, write all 0's to nonvolatile Wiper 0, SCL = VIL or VIH | 4 | |||
| Serial interface inactive (standby) current | 2.5 | 5 | µA | Stop condition, SCL = SDA = VIH, Wiper = 0, VDD = 5.5V, HVC/A0 = VIH | 4 | ||
| Maximum current through terminal A | IW | 2.5 | mA | Terminal A IAW, W = Full Scale (FS) | 6 | ||
| Maximum current through terminal B | IW | 2.5 | mA | Terminal B IBW, W = Zero Scale (ZS) | 6 | ||
| Maximum current through terminal W | IW | 2.5 | mA | Terminal W IAW (W = FS) or IBW (W = ZS) | 6 | ||
| Maximum RAB current (10 kΩ) | IAB | 0.688 | mA | VB = 0V, VA = 5.5V, RAB(MIN) = 8000Ω | 6 | ||
| Full scale error (MCP44X1, 7-bit) | VWFSE | -2 | -0.1 | LSb | 10 kΩ 7-bit, 3.0V ≤ VDD ≤ 5.5V | 7 | |
| Zero scale error (MCP44X1, 7-bit) | VWZSE | 0.1 | 2 | LSb | 10 kΩ 7-bit, 3.0V ≤ VDD ≤ 5.5V | 7 | |
| Potentiometer integral non-linearity (7-bit) | INL | -0.5 | 0.25 | 0.5 | LSb | 7-bit | 7 |
| Potentiometer differential non-linearity (7-bit) | DNL | -0.25 | 0.125 | 0.25 | LSb | 7-bit | 7 |
| Rheostat integral non-linearity, 5.5V (10 kΩ, 7-bit) | R-INL | -1.125 | 0.5 | 1.125 | LSb | 10 kΩ 7-bit 5.5V, IW = 450 µA | 8 |
| Rheostat integral non-linearity, 3.0V (10 kΩ, 7-bit) | R-INL | -4 | 2.5 | 4 | LSb | 10 kΩ 7-bit 3.0V, IW = 240 µA (Note 7) | 8 |
| Rheostat differential non-linearity, 5.5V (10 kΩ, 7-bit) | R-DNL | -0.375 | 0.25 | 0.375 | LSb | 10 kΩ 7-bit 5.5V, IW = 450 µA | 9 |
| Rheostat differential non-linearity, 3.0V (10 kΩ, 7-bit) | R-DNL | -0.75 | 0.5 | 0.75 | LSb | 10 kΩ 7-bit 3.0V, IW = 240 µA (Note 7) | 9 |
| Wiper resistance at 5.5V | RW | 75 | 160 | Ω | VDD = 5.5 V, IW = 2.0 mA, code = 00h | 5 | |
| Wiper resistance at 2.7V | RW | 75 | 300 | Ω | VDD = 2.7 V, IW = 2.0 mA, code = 00h | 5 | |
| High input threshold, all inputs except SDA and SCL | VIH | 0.45 | VDD | 2.7V ≤ VDD ≤ 5.5V (allows 2.7V digital VDD with 5V analog VDD) | 10 | ||
| High input threshold, all inputs except SDA and SCL, low VDD | VIH | 0.5 | VDD | 1.8V ≤ VDD ≤ 2.7V | 10 | ||
| High input threshold, SDA and SCL | VIH | 0.7 | VDD | SDA and SCL, 100 kHz | 10 | ||
| Low input threshold, all inputs except SDA and SCL | VIL | 0.2 | VDD | All inputs except SDA and SCL | 10 | ||
| Low input threshold, SDA and SCL | VIL | -0.5 | 0.3 | VDD | SDA and SCL, 100 kHz | 10 | |
| High voltage input entry voltage (WiperLock) | VIHHEN | 9 | 12.5 | V | Threshold for WiperLock Technology | 10 | |
| High voltage limit | VMAX | 12.5 | V | Pin can tolerate VMAX or less | 10 | ||
| Output low voltage (SDA), VDD < 2.0V | VOL | 0.2 | VDD | VDD < 2.0V, IOL = 1 mA | 10 | ||
| Output low voltage (SDA), VDD ≥ 2.0V | VOL | 0.4 | V | VDD ≥ 2.0V, IOL = 3 mA | 10 | ||
| Weak pull-up current | IPU | 1.75 | mA | Internal VDD pull-up, VIHH pull-down, VDD = 5.5V, VHVC = 12.5V | 11 | ||
| Input leakage current | IIL | -1 | 1 | µA | VIN = VDD (all pins) and VIN = VSS (all pins except RESET) | 11 | |
| RESET pulse width | tRST | 50 | ns | 12 | |||
| Nominal resistance tempco, TA -20°C to +70°C | ΔRAB/ΔT | 50 | ppm/°C | TA = -20°C to +70°C | 5 | ||
| Nominal resistance tempco, TA -40°C to +85°C | ΔRAB/ΔT | 100 | ppm/°C | TA = -40°C to +85°C | 5 | ||
| Nominal resistance tempco, TA -40°C to +125°C | ΔRAB/ΔT | 150 | ppm/°C | TA = -40°C to +125°C | 5 | ||
| Ratiometric tempco | ΔVWB/ΔT | 15 | ppm/°C | Code = Midscale (80h or 40h) | 5 | ||
| Thermal resistance, 20L-QFN junction to ambient | θJA | 43 | °C/W | 17 |
CAD (KiCad official)
- Symbol:
MCP4441-103E - Footprint:
Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm - 3D model: QFN-20-EP(4x4) (KiCad packages3D, STEP)
- 3D model files:
mcp4441-103e-etched.step/mcp4441-103e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp4441-103e.step/mcp4441-103e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (100 pp, sha256
c64d93992e9b7079, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).