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MCP4361-103E
Public Made by Adomby adom
Microchip Tech Digital Potentiometers, QFN-20-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMCP4361-103E
Microchip Tech · Digital Potentiometers · QFN-20-EP(4x4)
MCP4361-103E from Microchip Tech, in a QFN-20-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P3B | passive | Potentiometer 3 Terminal B, the zero-scale (wiper 0x00) connection, which must be held between VSS and VDD. |
| 2 | CS | input | SPI chip select input, high-voltage tolerant with Schmitt trigger; VIL enables serial commands and VIHH enables high-voltage serial commands. |
| 3 | SCK | input | SPI clock input, high-voltage tolerant with Schmitt trigger. |
| 4 | SDI | input | SPI serial data input, high-voltage tolerant with Schmitt trigger, connected to the host controller's SDO. |
| 5 | VSS | power_in | Device ground reference. |
| 6 | P1B | passive | Potentiometer 1 Terminal B, the zero-scale connection, which must be held between VSS and VDD. |
| 7 | P1W | passive | Potentiometer 1 wiper terminal, which must be held between VSS and VDD. |
| 8 | P1A | passive | Potentiometer 1 Terminal A, the full-scale connection, which must be held between VSS and VDD. |
| 9 | P0A | passive | Potentiometer 0 Terminal A, the full-scale connection, which must be held between VSS and VDD. |
| 10 | P0W | passive | Potentiometer 0 wiper terminal, which must be held between VSS and VDD. |
| 11 | P0B | passive | Potentiometer 0 Terminal B, the zero-scale connection, which must be held between VSS and VDD. |
| 12 | WP | input | Hardware EEPROM write protect input that forces the non-volatile memory to be write protected; it has a smart pull-up that shuts off when the pin is forced low. |
| 13 | RESET | input | Hardware reset input, high-voltage tolerant with Schmitt trigger and weak pull-up, that forces the device into the POR/BOR state. |
| 14 | SDO | output | SPI serial data output, connected to the host controller's SDI, used to read registers or monitor the command error bit. |
| 15 | VDD | power_in | Positive power supply input relative to VSS; device operates from 1.8V to 5.5V, with specifications guaranteed from 2.7V to 5.5V. |
| 16 | P2B | passive | Potentiometer 2 Terminal B, the zero-scale connection, which must be held between VSS and VDD. |
| 17 | P2W | passive | Potentiometer 2 wiper terminal, which must be held between VSS and VDD. |
| 18 | P2A | passive | Potentiometer 2 Terminal A, the full-scale connection, which must be held between VSS and VDD. |
| 19 | P3A | passive | Potentiometer 3 Terminal A, the full-scale connection, which must be held between VSS and VDD. |
| 20 | P3W | passive | Potentiometer 3 wiper terminal, which must be held between VSS and VDD. |
| 21 | EP | passive | Exposed pad connected to the die substrate; tie to the same potential as VSS or leave unconnected, and it can serve as a heat sink. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | QFN-20-EP(4x4) |
| Category | ADC/DAC/Data Conversion |
| Pins | 21 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Resistance RAB (-103 devices) | RAB | 8 | 10 | 12 | kΩ | -103 devices (Note 1), ±20% | 5 |
| Supply Voltage | VDD | 2.7 | 5.5 | V | 4 | ||
| Supply Voltage (serial interface only) | VDD | 1.8 | 2.7 | V | Serial Interface only. | 4 | |
| Operating Temperature | TA | -40 | 125 | °C | 15 | ||
| VDD Start Voltage to ensure Wiper Reset | VBOR | 1.65 | V | RAM retention voltage (VRAM) < VBOR | 4 | ||
| Delay after device exits reset state | TBORD | 10 | 20 | µs | (VDD > VBOR) | 4 | |
| Supply Current, serial interface active | IDD | 450 | µA | VDD = 5.5V, CS = VIL, SCK @ 5 MHz, write all 0's to volatile Wiper 0 (address 0h) | 4 | ||
| Supply Current, EE write | IDD | 1 | mA | EE Write Current, VDD = 5.5V, CS = VIL, SCK @ 5 MHz, write all 0's to non-volatile Wiper 0 (address 2h) | 4 | ||
| Supply Current, serial interface inactive | IDD | 2.5 | 5 | µA | Serial Interface Inactive, CS = VIH, VDD = 5.5V | 4 | |
| Supply Current, high-voltage decrement | IDD | 0.55 | 1 | mA | Serial Interface Active, VDD = 5.5V, CS = VIHH, SCK @ 5 MHz, decrement non-volatile Wiper 0 (address 2h) | 4 | |
| Wiper Resistance 5.5V | RW | 75 | 160 | Ω | VDD = 5.5 V, IW = 2.0 mA, code = 00h | 5 | |
| Wiper Resistance 2.7V | RW | 75 | 300 | Ω | VDD = 2.7 V, IW = 2.0 mA, code = 00h | 5 | |
| Nominal Resistance Tempco | ΔRAB/ΔT | 50 | ppm/°C | TA = -20°C to +70°C | 5 | ||
| Nominal Resistance Tempco | ΔRAB/ΔT | 100 | ppm/°C | TA = -40°C to +85°C | 5 | ||
| Nominal Resistance Tempco | ΔRAB/ΔT | 150 | ppm/°C | TA = -40°C to +125°C | 5 | ||
| Ratiometric Tempco | ΔVWB/ΔT | 15 | ppm/°C | Code = Midscale (80h or 40h) | 5 | ||
| Resistor Terminal Input Voltage Range | VA,VW,VB | 0 | 5.5 | V | Vss to VDD; Note 5, Note 6 | 6 | |
| Maximum current through A, W or B | IW | 2.5 | mA | Note 6, Worst case current through wiper when wiper is either Full Scale or Zero Scale. | 6 | ||
| Full Scale Error 10 kΩ 8-bit | VWFSE | -3.5 | -0.1 | LSb | 10 kΩ 8-bit 3.0V ≤ VDD ≤ 5.5V | 7 | |
| Zero Scale Error 10 kΩ 8-bit | VWZSE | 0.1 | 3.5 | LSb | 10 kΩ 8-bit 3.0V ≤ VDD ≤ 5.5V | 7 | |
| Potentiometer INL 8-bit | INL | -1 | 0.5 | 1 | LSb | 8-bit 3.0V ≤ VDD ≤ 5.5V, MCP43X1 devices only (Note 2) | 7 |
| Potentiometer DNL 8-bit | DNL | -0.5 | 0.25 | 0.5 | LSb | 8-bit 3.0V ≤ VDD ≤ 5.5V, MCP43X1 devices only (Note 2) | 7 |
| Bandwidth -3 dB 10 kΩ 8-bit | BW | 1 | MHz | 10 kΩ 8-bit Code = 80h | 7 | ||
| Rheostat INL 10 kΩ 8-bit 5.5V | R-INL | -1.5 | 0.5 | 1.5 | LSb | 10 kΩ 8-bit 5.5V, IW = 450 µA | 8 |
| Rheostat INL 10 kΩ 8-bit 3.0V | R-INL | -5.5 | 2.5 | 5.5 | LSb | 10 kΩ 8-bit 3.0V, IW = 240 µA (Note 7) | 8 |
| Rheostat DNL 10 kΩ 8-bit 5.5V | R-DNL | -0.5 | 0.25 | 0.5 | LSb | 10 kΩ 8-bit 5.5V, IW = 450 µA | 9 |
| Rheostat DNL 10 kΩ 8-bit 3.0V | R-DNL | -1 | 0.25 | 1 | LSb | 10 kΩ 8-bit 3.0V (Note 7) | 9 |
| Capacitance (PA) | CAW | 75 | pF | f =1 MHz, Code = Full Scale | 9 | ||
| Capacitance (PW) | CW | 120 | pF | f =1 MHz, Code = Full Scale | 9 | ||
| Capacitance (PB) | CBW | 75 | pF | f =1 MHz, Code = Full Scale | 9 | ||
| Schmitt Trigger High Input Threshold | VIH | 0.45 | V | 2.7V ≤ VDD ≤ 5.5V; min is 0.45 VDD | 10 | ||
| Schmitt Trigger Low Input Threshold | VIL | 0.2 | V | max is 0.2VDD | 10 | ||
| High Voltage Input Entry Voltage | VIHH | 8.5 | 12.5 | V | Threshold for WiperLock Technology (Note 6) | 10 | |
| High Voltage Limit | VMAX | 12.5 | V | Pin can tolerate VMAX or less. (Note 6) | 10 | ||
| Output Low Voltage (SDO) | VOL | 0 | 0.3 | V | IOL = 5 mA, VDD = 5.5V; max is 0.3VDD | 10 | |
| Output High Voltage (SDO) | VOH | 0.7 | V | IOH = -2.5 mA, VDD = 5.5V; min is 0.7VDD | 10 | ||
| Weak Pull-up Current | IPU | 1.75 | mA | Internal VDD pull-up, VIHH pull-down, VDD = 5.5V, VCS = 12.5V | 11 | ||
| Input Leakage Current | IIL | -1 | 1 | µA | VIN = VDD (all pins) and VIN = VSS (all pins except RESET) | 11 | |
| EEPROM Programming Write Cycle Time | tWC | 3 | 10 | ms | 11 | ||
| Power Supply Sensitivity 8-bit | PSS | 0.0015 | 0.0035 | %/% | 8-bit VDD = 2.7V to 5.5V, VA = 2.7V, Code = 80h | 11 | |
| RESET pulse width | tRST | 50 | ns | 12 | |||
| SCK Input Frequency | FSCK | 10 | MHz | VDD = 2.7V to 5.5V | 13 | ||
| SCK input high time | TscH | 45 | ns | VDD = 2.7V to 5.5V | 13 | ||
| SCK input low time | TscL | 45 | ns | VDD = 2.7V to 5.5V | 13 | ||
| SDO data output valid after SCK falling edge | TscL2DOV | 70 | ns | VDD = 2.7V to 5.5V | 13 | ||
| Voltage on VDD with respect to VSS | VDD | -0.6 | 7 | V | 3 | ||
| Voltage on CS, SCK, SDI, WP, RESET | -0.6 | 12.5 | V | with respect to VSS | 3 | ||
| Voltage on PxA, PxW, PxB, SDO | -0.3 | V | -0.3V to VDD + 0.3V with respect to VSS | 3 | |||
| Maximum current into PXA, PXW & PXB pins | -2.5 | 2.5 | mA | 3 | |||
| Storage temperature | -65 | 150 | °C | 3 | |||
| Maximum Junction Temperature | TJ | 150 | °C | 3 | |||
| Thermal Resistance, 20L-QFN | θJA | 43 | °C/W | 15 |
CAD (KiCad official)
- Symbol:
MCP4361-103E - Footprint:
Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm - 3D model: QFN-20-EP(4x4) (KiCad packages3D, STEP)
- 3D model files:
mcp4361-103e-etched.step/mcp4361-103e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp4361-103e.step/mcp4361-103e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (80 pp, sha256
4c13d6e29f4050bf, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).