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MCP41HV51-503E

Microchip Tech · Pre-ordered MCUs · TSSOP-14

MCP41HV51-503E from Microchip Tech, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VL power_in Positive digital power supply input relative to DGND, ranging from 1.8V to 5.5V, with a decoupling capacitor to DGND recommended.
2 SCK input SPI serial clock input (Schmitt Trigger); the device is an SPI slave so this pin is input-only.
3 CS input SPI chip select input (Schmitt Trigger); forcing CS to VIL enables the serial commands.
4 SDI input SPI serial data in pin (Schmitt Trigger), connected to the host controller's SDO pin.
5 SDO output SPI serial data out pin, used to read the wiper and TCON registers or monitor the command error bit.
6 WLAT input Wiper latch enable (Schmitt Trigger): 0 = received SPIBUF value is transferred to the wiper register, 1 = received SPI data is held in SPIBUF.
7 SHDN input Shutdown input (Schmitt Trigger) that forces the resistor network terminals into the hardware shutdown state.
8 NC unconnected Not internally connected to the die; to reduce noise coupling, connect to either DGND or VL.
9 DGND power_in Digital ground reference of the device.
10 V- power_in Analog negative potential supply; must not have a higher potential than the DGND pin.
11 P0B passive Potentiometer 0 Terminal B, the fixed connection to the zero-scale wiper value (0x00); voltage must be between V+ and V-.
12 P0W passive Potentiometer 0 wiper terminal, the adjustable terminal; voltage must be between V+ and V-.
13 P0A passive Potentiometer 0 Terminal A, the fixed connection to the full-scale wiper value (0xFF for 8-bit); voltage must be between V+ and V-.
14 V+ power_in Analog positive potential supply; must have a higher potential than the V- pin.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TSSOP-14
Category Embedded Processors & Controllers
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Nominal end-to-end resistance RAB 40 50 60 kΩ -503 devices, V+/V- = 10V to 36V 5
Resistance tolerance RAB -20 20 % -503 devices 5
Digital supply voltage VL 2.7 5.5 V With respect to DGND 4
Digital supply voltage (DGND = V- + 0.9V) VL 1.8 5.5 V DGND = V- + 0.9V (referenced to V-) 4
Analog supply voltage V+ 36 V With respect to V- 4
Resistor network supply voltage VRN 36 V Delta voltage between V+ and V- 4
Digital supply current, active IDDD 45 300 µA Serial Interface Active, VL = 5.5V, CS = VIL, FSCK = 5 MHz, V- = DGND 5
Digital supply current, inactive IDDD 7 µA Serial Interface Inactive, VL = 5.5V, SCK = VIH, CS = VIH, Wiper = 0, V- = DGND 5
Analog supply current IDDA 5 µA Current V+ to V-, PxA = PxB = PxW, DGND = V- +(V+/2) 5
RAB current IAB 0.9 mA -503 devices 5
Wiper resistance RW 75 170 Ω IW = 1 mA V+ = +18V, V- = -18V, code = 00h, PxA = floating, PxB = V- 6
Wiper resistance RW 145 200 Ω IW = 1 mA V+ = +5.0V, V- = -5.0V, code = 00h, PxA = floating, PxB = V- 6
Nominal resistance temperature coefficient RAB/T 50 ppm/°C TA = -40°C to +85°C 6
Nominal resistance temperature coefficient RAB/T 100 ppm/°C TA = -40°C to +125°C 6
Ratiometric tempco VWB/T 15 ppm/°C Code = Mid-scale (80h or 40h) 6
Current through terminals IT, IW 6.5 mA -503 devices IBW(W ≠ ZS) and IAW(W ≠ FS) 6
Current through terminals, ZS/FS IT, IW 36 mA IBW(W = ZS), or IAW(W = FS) 6
Full-scale error VWFSE -1 LSb 50 k 8-bit VAB = 20V to 36V 7
Full-scale error VWFSE -1.4 LSb 50 k 8-bit VAB = 10V to 36V 7
Zero-scale error VWZSE 0.9 LSb 50 k 8-bit VAB = 20V to 36V 8
Zero-scale error VWZSE 1.3 LSb 50 k 8-bit VAB = 10V to 36V 8
Potentiometer INL P-INL -1.1 0.5 1.1 LSb 50 k 8-bit VAB = 10V to 36V 9
Potentiometer DNL P-DNL -0.25 0.125 0.25 LSb 50 k 8-bit VAB = 10V to 36V 9
Rheostat INL R-INL -1 1 LSb 50 k 8-bit IW = 600 µA, (V+ - V-) = 36V 11
Rheostat INL R-INL -1.2 1.2 LSb 50 k 8-bit IW = 170 µA, (V+ - V-) = 10V 11
Rheostat DNL R-DNL -0.5 0.5 LSb 50 k 8-bit IW = 600 µA, (V+ - V-) = 36V 12
Schmitt trigger high-input threshold VIH 0.45 V 2.7V ≤ VL ≤ 5.5V (x VL) 13
Schmitt trigger low-input threshold VIL 0.2 V x VL 13
Output low voltage (SDO) VOL 0.2 V VL = 5.5V, IOL = 5 mA (x VL) 13
Output high voltage (SDO) VOH 0.8 V VL = 5.5V, IOH = -2.5 mA (x VL) 13
Input leakage current IIL -1 1 uA VIN = VL and VIN = DGND 13
Power supply sensitivity PSS 0.0015 0.0035 %/% 8-bit VL = 2.7V to 5.5V, V+ = 18V, V- = -18V, Code = 7Fh 14
SCK input frequency FSCK 10 MHz VL = 2.7V to 5.5V 17
Operating temperature range TA -40 125 °C 19
Thermal resistance, TSSOP-14 θJA 100 °C/W 14L-TSSOP (ST) 19
Package power dissipation TSSOP-14 1000 mW TA = +50°C, TJ = +150°C 3
Max junction temperature TJ 150 °C 3
Storage temperature Tstg -65 150 °C 3
Voltage on V+ with respect to V- V+ 40 V 3
Voltage on VL with respect to DGND VL -0.6 7 V 3
Continuous current into PxA, PxW, PxB -6.5 6.5 mA RAB = 50 k 3

CAD (KiCad official)

  • Symbol: MCP41HV51-503E
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: mcp41hv51-503e-etched.step / mcp41hv51-503e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp41hv51-503e.step / mcp41hv51-503e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (92 pp, sha256 93f543bd1e07174a, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF