# MCP41HV51-103E

**Microchip Tech** · Pre-ordered MCUs · TSSOP-14

MCP41HV51-103E from Microchip Tech, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VL | power_in | Positive digital power supply input relative to DGND, ranging from 1.8V to 5.5V, with a decoupling capacitor to DGND recommended. |
| 2 | SCK | input | SPI serial clock input (Schmitt trigger), input-only since the device is an SPI slave. |
| 3 | CS | input | Chip select input (Schmitt trigger); forcing it to VIL enables serial commands. |
| 4 | SDI | input | SPI serial data input (Schmitt trigger), connected to the host controller's SDO pin. |
| 5 | SDO | output | SPI serial data output used to read the wiper and TCON registers or monitor the command error bit. |
| 6 | WLAT | input | Wiper latch enable input: 0 transfers the received SPIBUF value to the wiper register, 1 holds the received data in SPIBUF. |
| 7 | SHDN | input | Shutdown input (Schmitt trigger) that forces the resistor network terminals into the hardware shutdown state. |
| 8 | NC | unconnected | Not internally connected to the die; connect to DGND or VL to reduce noise coupling. |
| 9 | DGND | power_in | Digital ground reference of the device. |
| 10 | V- | power_in | Analog negative potential supply, which must not have a higher potential than the DGND pin. |
| 11 | P0B | passive | Potentiometer 0 Terminal B, the fixed zero-scale (wiper code 0x00) connection, with voltage required to be between V+ and V-. |
| 12 | P0W | passive | Potentiometer 0 wiper terminal, adjustable, supporting positive and negative current, with voltage required to be between V+ and V-. |
| 13 | P0A | passive | Potentiometer 0 Terminal A, the fixed full-scale (0xFF for 8-bit, 0x7F for 7-bit) connection, with voltage required to be between V+ and V-. |
| 14 | V+ | power_in | Analog positive potential supply, which must be at a higher potential than the V- pin. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TSSOP-14 |
| Category | Embedded Processors & Controllers |
| Pins | 14 |

## CAD (KiCad official)

- Symbol: `MCP41HV51-103E`
- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`
- 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files: `mcp41hv51-103e-etched.step` / `mcp41hv51-103e-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mcp41hv51-103e.step` / `mcp41hv51-103e.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Microchip Tech datasheet](https://ww1.microchip.com/downloads/aemDocuments/documents/MSLD/ProductDocuments/DataSheets/MCP41HVX1-Data-Sheet-20005207.pdf) (92 pp, sha256 `93f543bd1e07174a`, retrieved 2026-10-23, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/mcp41hv51-103e-datasheet.pdf)