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Contents

README

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MCP4162-103E

Microchip Tech · Pre-ordered MCUs · MSOP-8

MCP4162-103E from Microchip Tech, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS input SPI chip select input; forcing CS to VIL enables serial commands and forcing it to VIHH enables high-voltage serial commands (high-voltage tolerant digital input, Schmitt trigger, up to 12.5V).
2 SCK input SPI clock input (high-voltage tolerant Schmitt trigger input with internal weak pull-up, up to 10 MHz, modes 0,0 and 1,1).
3 SDI input SPI serial data input, connected to the host controller's SDO pin (high-voltage tolerant Schmitt trigger input with internal weak pull-up).
4 VSS power_in Device ground reference.
5 P0W passive Potentiometer 0 wiper terminal (rheostat), which can carry positive or negative current and must be held between VSS and VDD.
6 P0B passive Potentiometer 0 terminal B, the fixed zero-scale connection (wiper value 0x00) with no polarity relative to W, which must be held between VSS and VDD.
7 SDO output SPI serial data output, connected to the host controller's SDI pin, used to read the digital potentiometer registers or monitor the command error bit.
8 VDD power_in Positive power supply input relative to VSS, 2.7V to 5.5V with device characteristics specified and 1.8V to 5.5V for device operation.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package MSOP-8
Category Embedded Processors & Controllers
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VDD 2.7 5.5 V 4
Supply Voltage (serial interface only) VDD 1.8 2.7 V Serial Interface only. 4
Nominal Resistance (A to B), -103 RAB 8 10 12 kΩ -103 devices (Note 1); Resistance (± 20%) 5
Resistance tolerance RAB -20 20 % Resistance (± 20%) 5
Wiper Resistance RW 75 160 Ω VDD = 5.5 V, IW = 2.0 mA, code = 00h 5
Wiper Resistance RW 75 300 Ω VDD = 2.7 V, IW = 2.0 mA, code = 00h 5
Maximum current through A, W or B IW 2.5 mA Note 6, Worst case current through wiper when wiper is either Full-Scale or Zero Scale. 5
Resistor Terminal Input Voltage Range VA,VW,VB 0 V Vss to VDD; Note 5, Note 6 5
Supply Current, serial interface active IDD 450 µA Serial Interface Active, VDD = 5.5V, CS = VIL, SCK @ 5 MHz, write all 0’s to volatile Wiper 0 (address 0h) 4
Supply Current, EE write IDD 1 mA EE Write Current, VDD = 5.5V, CS = VIL, SCK @ 5 MHz, write all 0’s to non-volatile Wiper 0 (address 2h) 4
Supply Current, serial interface inactive IDD 2.5 5 µA Serial Interface Inactive, CS = VIH, VDD = 5.5V 4
Supply Current, high-voltage decrement IDD 0.55 1 mA Serial Interface Active, VDD = 5.5V, CS = VIHH, SCK @ 5 MHz, decrement non-volatile Wiper 0 (address 2h) 4
VDD Start Voltage to ensure Wiper Reset VBOR 1.65 V RAM retention voltage (VRAM) < VBOR 4
Delay after device exits reset state TBORD 10 20 µs VDD > VBOR 4
HV pin voltage range (CS, SDI, SCK, WP, SHDN) VHV 0 12.5 V VDD ≥ 4.5V; VSS to 12.5V 4
HV pin voltage range (CS, SDI, SCK, WP, SHDN) VHV 0 V VDD < 4.5V; VSS to VDD + 8.0V 4
Rheostat Integral Non-linearity, 5.5V R-INL -1.5 0.5 1.5 LSb 10 kΩ 8-bit 5.5V, IW = 450 µA 7
Rheostat Integral Non-linearity, 3.0V R-INL -5.5 2.5 5.5 LSb 10 kΩ 8-bit 3.0V, IW = 240 µA (Note 7) 7
Rheostat Differential Non-linearity, 5.5V R-DNL -0.5 0.25 0.5 LSb 10 kΩ 8-bit 5.5V, IW = 450 µA 8
Rheostat Differential Non-linearity, 3.0V R-DNL -1 0.25 1 LSb 10 kΩ 8-bit 3.0V (Note 7) 8
Schmitt Trigger High Input Threshold VIH 0.45 V 0.45 VDD min; 2.7V ≤ VDD ≤ 5.5V 9
Schmitt Trigger High Input Threshold VIH 0.5 V 0.5 VDD min; 1.8V ≤ VDD ≤ 2.7V 9
Schmitt Trigger Low Input Threshold VIL 0.2 V 0.2VDD max 9
High Voltage Input Entry Voltage VIHH 8.5 12.5 V Threshold for WiperLock Technology 9
High Voltage Limit VMAX 12.5 V Pin can tolerate VMAX or less. 9
Output Low Voltage (SDO) VOL 0 0.3 V 0.3VDD max; IOL = 5 mA, VDD = 5.5V 9
Output High Voltage (SDO) VOH 0.7 V 0.7VDD min; IOH = -2.5 mA, VDD = 5.5V 9
Input Leakage Current IIL -1 1 µA VIN = VDD and VIN = VSS 9
Weak pull-up/pull-down current IPU 1.75 mA Internal VDD pull-up, VIHH pull-down, VDD = 5.5V, VCS = 12.5V 9
EEPROM Programming Write Cycle Time tWC 5 10 ms 10
Power Supply Sensitivity PSS 0.0015 0.0035 %/% 8-bit VDD = 2.7V to 5.5V, VA = 2.7V, Code = 80h 10
Nominal Resistance Tempco ΔRAB/ΔT 50 ppm/°C TA = -20°C to +70°C 5
Nominal Resistance Tempco ΔRAB/ΔT 100 ppm/°C TA = -40°C to +85°C 5
Nominal Resistance Tempco ΔRAB/ΔT 150 ppm/°C TA = -40°C to +125°C 5
Bandwidth -3 dB BW 1 MHz 10 kΩ 8-bit Code = 80h, load = 30 pF 6
Capacitance (PW) CW 120 pF f =1 MHz, Code = Full-Scale 8
Capacitance (PB) CBW 75 pF f =1 MHz, Code = Full-Scale 8
SCK Input Frequency FSCK 10 MHz VDD = 2.7V to 5.5V 11
SCK input high time TscH 45 ns VDD = 2.7V to 5.5V 11
SCK input low time TscL 45 ns VDD = 2.7V to 5.5V 11
SDO data output valid after SCK↓ TscL2DOV 70 ns VDD = 2.7V to 5.5V 11
Voltage on VDD VDD -0.6 7 V with respect to VSS 3
Voltage on CS, SCK, SDI, WP, SHDN -0.6 12.5 V with respect to VSS 3
Voltage on PxA, PxW, PxB, SDO -0.3 V -0.3V to VDD + 0.3V with respect to VSS 3
Maximum current into PXA, PXW & PXB pins -2.5 2.5 mA ±2.5 mA 3
Storage temperature -65 150 °C 3
Ambient temperature with power applied -40 125 °C 3
Maximum Junction Temperature TJ 150 °C 3
Soldering temperature of leads 300 °C 10 seconds 3
Operating Temperature Range TA -40 125 °C 14
Thermal Resistance, 8L-MSOP θJA 211 °C/W 14

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin P = Plastic Dual In-line (PDIP) (300 mil), 8/14-lead SN = Plastic Small Outline (SOIC), (150 mil), 8-lead 85

CAD (KiCad official)

  • Symbol: MCP4162-103E
  • Footprint: Package_SO:MSOP-8_3x3mm_P0.65mm
  • 3D model: MSOP-8 (KiCad packages3D, STEP)
  • 3D model files: mcp4162-103e-etched.step / mcp4162-103e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp4162-103e.step / mcp4162-103e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (88 pp, sha256 485870dfa4cb7357, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF