component
MCP4161-503E
Public Made by Adomby adom
Microchip Tech Digital Potentiometers, PDIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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MCP4161-503E
Microchip Tech · Digital Potentiometers · PDIP-8
MCP4161-503E from Microchip Tech, in a PDIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS | input | SPI chip select input (high-voltage tolerant with Schmitt trigger); forcing it to VIL enables serial commands and VIHH enables high-voltage serial commands. |
| 2 | SCK | input | SPI clock input, high-voltage tolerant with Schmitt trigger and a smart weak pull-up. |
| 3 | SDI/SDO | bidirectional | Multiplexed SPI serial data input/output on the single-potentiometer 8-lead device; it drives read data after a valid Read command's first 6 bits, and the open-drain output uses the internal smart pull-up. |
| 4 | VSS | power_in | Device ground reference. |
| 5 | P0A | passive | Potentiometer 0 terminal A, the fixed full-scale connection (wiper value 0x100 for 8-bit); voltage must be between VSS and VDD. |
| 6 | P0W | passive | Potentiometer 0 wiper terminal, the adjustable terminal; voltage must be between VSS and VDD. |
| 7 | P0B | passive | Potentiometer 0 terminal B, the fixed zero-scale connection (wiper value 0x00); voltage must be between VSS and VDD. |
| 8 | VDD | power_in | Positive power supply input relative to VSS; electrical performance may not meet specifications below 2.7V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | PDIP-8 |
| Category | ADC/DAC/Data Conversion |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Nominal resistance (-503) | RAB | 40 | 50 | 60 | kΩ | -503 devices (Note 1), ±20% | 5 |
| Resistance tolerance | -20 | 20 | % | RAB | 5 | ||
| Nominal resistance tempco | ΔRAB/ΔT | 50 | ppm/°C | TA = -20°C to +70°C | 5 | ||
| Nominal resistance tempco | ΔRAB/ΔT | 100 | ppm/°C | TA = -40°C to +85°C | 5 | ||
| Nominal resistance tempco | ΔRAB/ΔT | 150 | ppm/°C | TA = -40°C to +125°C | 5 | ||
| Ratiometric tempco | ΔVWB/ΔT | 15 | ppm/°C | Code = Midscale (80h or 40h) | 5 | ||
| Supply voltage | VDD | 2.7 | 5.5 | V | 4 | ||
| Supply voltage (serial interface only) | VDD | 1.8 | 2.7 | V | Serial Interface only. | 4 | |
| Operating temperature | TA | -40 | 125 | °C | 14 | ||
| VDD start voltage for wiper reset | VBOR | 1.65 | V | RAM retention voltage (VRAM) < VBOR | 4 | ||
| Delay after device exits reset | TBORD | 10 | 20 | µs | VDD > VBOR | 4 | |
| Supply current, serial interface active | IDD | 450 | µA | VDD = 5.5V, CS = VIL, SCK @ 5 MHz, write all 0's to volatile Wiper 0 (address 0h) | 4 | ||
| Supply current, EE write | IDD | 1 | mA | VDD = 5.5V, CS = VIL, SCK @ 5 MHz, write all 0's to non-volatile Wiper 0 (address 2h) | 4 | ||
| Supply current, serial interface inactive | IDD | 2.5 | 5 | µA | CS = VIH, VDD = 5.5V | 4 | |
| Supply current, serial interface active (VIHH) | IDD | 0.55 | 1 | mA | VDD = 5.5V, CS = VIHH, SCK @ 5 MHz, decrement non-volatile Wiper 0 (address 2h) | 4 | |
| HV pin voltage range | VHV | 12.5 | V | VDD ≥ 4.5V, VSS to 12.5V | 4 | ||
| Wiper resistance | RW | 75 | 160 | Ω | VDD = 5.5 V, IW = 2.0 mA, code = 00h | 5 | |
| Wiper resistance | RW | 75 | 300 | Ω | VDD = 2.7 V, IW = 2.0 mA, code = 00h | 5 | |
| Resistor terminal input voltage range | VA,VW,VB | 0 | V | Vss to VDD, Note 5, Note 6 | 5 | ||
| Maximum current through A, W or B | IW | 2.5 | mA | Note 6, worst case current through wiper when wiper is either Full-Scale or Zero Scale. | 5 | ||
| Leakage current into A, W or B | IWL | 100 | nA | MCP4XX1 PxA = PxW = PxB = VSS | 5 | ||
| Full-scale error 50 kΩ 8-bit | VWFSE | -0.8 | -0.1 | LSb | 3.0V ≤ VDD ≤ 5.5V | 6 | |
| Zero-scale error 50 kΩ 8-bit | VWZSE | 0.1 | 0.8 | LSb | 3.0V ≤ VDD ≤ 5.5V | 6 | |
| Potentiometer INL 8-bit | INL | -1 | 0.5 | 1 | LSb | 3.0V ≤ VDD ≤ 5.5V, MCP4XX1 devices only (Note 2) | 6 |
| Potentiometer DNL 8-bit | DNL | -0.5 | 0.25 | 0.5 | LSb | 3.0V ≤ VDD ≤ 5.5V, MCP4XX1 devices only (Note 2) | 6 |
| Bandwidth -3 dB, 50 kΩ 8-bit | BW | 200 | kHz | Code = 80h, load = 30 pF | 6 | ||
| Rheostat INL 50 kΩ 8-bit | R-INL | -1.5 | 0.5 | 1.5 | LSb | 5.5V, IW = 90 µA | 7 |
| Rheostat INL 50 kΩ 8-bit | R-INL | -2 | 1 | 2 | LSb | 3.0V, IW = 48 µA (Note 7) | 7 |
| Rheostat DNL 50 kΩ 8-bit | R-DNL | -0.5 | 0.25 | 0.5 | LSb | 5.5V, IW = 90 µA | 8 |
| Capacitance (PA) | CAW | 75 | pF | f =1 MHz, Code = Full-Scale | 8 | ||
| Capacitance (PW) | CW | 120 | pF | f =1 MHz, Code = Full-Scale | 8 | ||
| Capacitance (PB) | CBW | 75 | pF | f =1 MHz, Code = Full-Scale | 8 | ||
| Schmitt trigger high input threshold | VIH | 0.45 | V | 2.7V ≤ VDD ≤ 5.5V; value is 0.45 VDD | 9 | ||
| Schmitt trigger low input threshold | VIL | 0.2 | V | value is 0.2VDD | 9 | ||
| High voltage input entry voltage | VIHH | 8.5 | 12.5 | V | Threshold for WiperLock Technology | 9 | |
| Output low voltage (SDO) | VOL | 0.3 | V | IOL = 5 mA, VDD = 5.5V; value is 0.3VDD | 9 | ||
| Output high voltage (SDO) | VOH | 0.7 | V | IOH = -2.5 mA, VDD = 5.5V; value is 0.7VDD | 9 | ||
| Input leakage current | IIL | -1 | 1 | µA | VIN = VDD and VIN = VSS | 9 | |
| CS pull-up/pull-down resistance | RCS | 16 | kΩ | VDD = 5.5V, VCS = 3V | 9 | ||
| Pin capacitance | CIN, COUT | 10 | pF | fC = 20 MHz | 9 | ||
| EEPROM write cycle time | tWC | 5 | 10 | ms | 10 | ||
| Power supply sensitivity | PSS | 0.0015 | 0.0035 | %/% | 8-bit VDD = 2.7V to 5.5V, VA = 2.7V, Code = 80h (MCP41X2 and MCP42X2 only) | 10 | |
| SCK input frequency | FSCK | 10 | MHz | VDD = 2.7V to 5.5V | 11 | ||
| SCK input high time | TscH | 45 | ns | VDD = 2.7V to 5.5V | 11 | ||
| SCK input low time | TscL | 45 | ns | VDD = 2.7V to 5.5V | 11 | ||
| SDO data output valid after SCK↓ | TscL2DOV | 70 | ns | VDD = 2.7V to 5.5V | 11 | ||
| Voltage on VDD with respect to VSS | VDD | -0.6 | 7 | V | 3 | ||
| Voltage on CS, SCK, SDI, WP, SHDN w.r.t. VSS | -0.6 | 12.5 | V | 3 | |||
| Maximum current into PXA, PXW & PXB pins | -2.5 | 2.5 | mA | ±2.5 mA | 3 | ||
| Storage temperature | -65 | 150 | °C | 3 | |||
| Ambient temperature with power applied | -40 | 125 | °C | 3 | |||
| Maximum junction temperature | TJ | 150 | °C | 3 | |||
| Thermal resistance, 8L-PDIP | θJA | 89.3 | °C/W | 14 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | P = Plastic Dual In-line (PDIP) (300 mil), 8/14-lead SN = Plastic Small Outline (SOIC), (150 mil), 8-lead | 85 |
CAD (KiCad official)
- Symbol:
MCP4161-503E - Footprint:
Package_DIP:DIP-8_W7.62mm - 3D model: PDIP-8 (KiCad packages3D, STEP)
- 3D model files:
mcp4161-503e-etched.step/mcp4161-503e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp4161-503e.step/mcp4161-503e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (88 pp, sha256
485870dfa4cb7357, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).