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MCP4152-502E

Public Made by Adom

by adom

Microchip Tech Digital Potentiometers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentadc-dac-data conversionmcp4152-502efactory-2.0.0extractor-text

Verified MCP4152-502E

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: MCP4152-502E · SOIC-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 88-page datasheet
  • •distributor (warn): no ['digikey', 'mouser'] number
  • ✓family: SOIC-8_3.9x4.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-i5xnj0lv/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ mcp4152-502e.kicad_sym✓ mcp4152-502e.kicad_mod✓ mcp4152-502e.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 7d ago
viewers mcp4152-502e: viewers · Ray 7d ago
mcp4152-502e-etched.glb Publish 0.1.0 · Ray 7d ago
mcp4152-502e-etched.step mcp4152-502e: factory component page (tier=mfr) · Ray 7d ago
mcp4152-502e-hero.glb mcp4152-502e: hero GLB from the etched model (keeps the MPN mark) · Ray 7d ago
mcp4152-502e-hero.overlay.json Publish 0.1.0 · Ray 7d ago
mcp4152-502e.glb Publish 0.1.0 · Ray 7d ago
mcp4152-502e.kicad_mod Publish 0.1.0 · Ray 7d ago
mcp4152-502e.kicad_sym Publish 0.1.0 · Ray 7d ago
mcp4152-502e.lbr Publish 0.1.0 · Ray 7d ago
mcp4152-502e.step Publish 0.1.0 · Ray 7d ago
package.json Publish 0.1.0 · Ray 7d ago
page.json Set visibility: public · Ray 7d ago
README.md Publish 0.1.0 · Ray 7d ago
verification.json Verified: Published by the parts factory: tier mfr, 8 pins · Ray 7d ago

MCP4152-502E

Microchip Tech · Digital Potentiometers · SOIC-8

MCP4152-502E from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS input Serial interface chip select input (high-voltage tolerant with Schmitt trigger); forcing CS to VIL enables serial commands and forcing it to VIHH enables high-voltage serial commands.
2 SCK input SPI serial clock input (high-voltage tolerant with Schmitt trigger), with the internal weak pull-up on digital inputs.
3 SDI input Serial data input connected to the host controller's SDO pin (high-voltage tolerant with Schmitt trigger), with the internal weak pull-up on digital inputs.
4 VSS power_in Device ground reference; the voltage on the potentiometer terminals must be between VSS and VDD.
5 P0W passive Potentiometer 0 wiper terminal, which can carry positive or negative current and must stay between VSS and VDD.
6 P0B passive Potentiometer 0 terminal B, fixed to the zero-scale wiper value (0x00), which can carry positive or negative current and must stay between VSS and VDD.
7 SDO output Serial data output connected to the host controller's SDI pin, used to read the digital potentiometer registers or monitor the command error bit.
8 VDD power_in Positive power supply input relative to VSS; the electrical performance may not meet the data sheet specifications while VDD is below Vmin (2.7V).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8
Category ADC/DAC/Data Conversion
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Voltage on VDD with respect to VSS VDD -0.6 7 V Voltage on VDD with respect to VSS 3
Voltage on CS, SCK, SDI, SDI/SDO and SHDN with respect to VSS -0.6 12.5 V With respect to VSS 3
Voltage on all other pins (PxA, PxW, PxB, SDO) with respect to VSS -0.3 V With respect to VSS; upper limit printed as VDD + 0.3V 3
Input clamp current IIK -20 20 mA VI < 0, VI > VDD, VI > VPP ON HV pins 3
Output clamp current IOK -20 20 mA VO < 0 or VO > VDD 3
Maximum output current sunk by any Output pin 25 mA 3
Maximum output current sourced by any Output pin 25 mA 3
Maximum current out of VSS pin 100 mA 3
Maximum current into VDD pin 100 mA 3
Maximum current into PxA, PxW and PxB pins -2.5 2.5 mA 3
Storage temperature TA -65 150 °C 3
Ambient temperature with power applied TA -40 125 °C 3
Soldering temperature of leads 300 °C 10 seconds 3
Maximum junction temperature TJ 150 °C 3
ESD protection on all pins 4 kV HBM, printed as ≥ 4 kV 3
ESD protection on all pins 300 V MM, printed as ≥ 300V 3
Supply voltage VDD 2.7 5.5 V 5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ devices 4
Supply voltage, serial interface only VDD 1.8 2.7 V Serial interface only 4
VDD start voltage to ensure wiper reset VBOR 1.65 V RAM retention voltage (VRAM) < VBOR 4
Delay after device exits the reset state TBORD 10 20 µs (VDD > VBOR) 4
Supply current, serial interface active (write) IDD 450 µA Serial interface active, VDD = 5.5V, CS = VIL, SCK @ 5 MHz, write all 0's to volatile Wiper 0 (address 0h) 4
Supply current, serial interface inactive IDD 2.5 5 µA Serial interface inactive, CS = VIH, VDD = 5.5V 4
Supply current, serial interface active (decrement) IDD 0.55 1 mA Serial interface active, VDD = 5.5V, CS = VIHH, SCK @ 5 MHz, decrement volatile Wiper 0 (address 0h) 4
Resistance between terminals A and B RAB 4 5 6 kΩ -502 devices (Note 1); ±20% 5
Wiper resistance RW 75 160 Ω VDD = 5.5 V, IW = 2.0 mA, code = 00h 5
Wiper resistance RW 75 300 Ω VDD = 2.7 V, IW = 2.0 mA, code = 00h 5
Maximum current through A, W or B IW 2.5 mA Note 6, worst case current through wiper when wiper is either Full-Scale or Zero Scale 5
Rheostat integral non-linearity R-INL -1.5 1.5 LSb 5 kΩ 8-bit, 5.5V, IW = 900 µA; typ printed ±0.5 7
Rheostat integral non-linearity R-INL -8.25 4.5 8.25 LSb 5 kΩ 8-bit, 3.0V, IW = 480 µA (Note 7) 7
Rheostat differential non-linearity R-DNL -0.5 0.5 LSb 5 kΩ 8-bit, 5.5V, IW = 900 µA; typ printed ±0.25 8
Rheostat differential non-linearity R-DNL -1 0.5 1 LSb 5 kΩ 8-bit, 3.0V (Note 7) 8
High voltage limit VMAX 12.5 V Pin can tolerate VMAX or less 9
CS, SDI, SDO, SCK, SHDN pin voltage range VHV 12.5 V VDD ≥ 4.5V 4
Weak pull-up / pull-down current IPU 1.75 mA Internal VDD pull-up, VIHH pull-down, VDD = 5.5V, VCS = 12.5V 9
Input leakage current IIL -1 1 µA VIN = VDD and VIN = VSS 9
Power supply sensitivity PSS 0.0015 0.0035 %/% 8-bit, VDD = 2.7V to 5.5V, VA = 2.7V, Code = 80h 10
SCK input frequency FSCK 10 MHz VDD = 2.7V to 5.5V 11
CS active (VIL or VIHH) to SCK↑ input TcsA2scH 60 ns 11
SCK input high time TscH 45 ns VDD = 2.7V to 5.5V 11
SCK input low time TscL 45 ns VDD = 2.7V to 5.5V 11
Setup time of SDI input to SCK↑ edge TDIV2scH 10 ns 11
Hold time of SDI input from SCK↑ edge TscH2DIL 20 ns 11
CS inactive (VIH) to SDO output hi-impedance TcsH2DOZ 50 ns Note 1 11
SDO data output valid after SCK↓ edge TscL2DOV 70 ns VDD = 2.7V to 5.5V 11
CS inactive (VIH) after SCK↑ edge TscH2csI 100 ns VDD = 2.7V to 5.5V 11
Hold time of CS inactive (VIH) to CS active (VIL or VIHH) TcsA2csI 50 ns 11
Operating temperature range TA -40 125 °C Extended temperature range 14
Nominal resistance tempco ΔRAB/ΔT 50 ppm/°C TA = -20°C to +70°C 5
Nominal resistance tempco ΔRAB/ΔT 100 ppm/°C TA = -40°C to +85°C 5
Nominal resistance tempco ΔRAB/ΔT 150 ppm/°C TA = -40°C to +125°C 5
Ratiometric tempco ΔVWB/ΔT 15 ppm/°C Code = Midscale (80h or 40h) 5
Leakage current into A, W or B IWL 100 nA MCP4XX2, PxB = PxW = VSS 5
Bandwidth -3 dB BW 2 MHz 5 kΩ 8-bit, Code = 80h (See Figure 2-64, load = 30 pF) 6
Capacitance (PA) CAW 75 pF f = 1 MHz, Code = Full-Scale 8
Capacitance (PW) CW 120 pF f = 1 MHz, Code = Full-Scale 8
Capacitance (PB) CBW 75 pF f = 1 MHz, Code = Full-Scale 8
CS pull-up / pull-down resistance RCS 16 kΩ VDD = 5.5V, VCS = 3V 9
Weak pull-up current, CS pin IPU 170 µA CS pin, VDD = 5.5V, VCS = 3V 9
Thermal resistance, 8L-SOIC θJA 149.5 °C/W 8-lead SOIC package 14

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin P = Plastic Dual In-line (PDIP) (300 mil), 8/14-lead SN = Plastic Small Outline (SOIC), (150 mil), 8-lead 85

CAD (KiCad official)

  • Symbol: MCP4152-502E
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: mcp4152-502e-etched.step / mcp4152-502e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp4152-502e.step / mcp4152-502e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (88 pp, sha256 6c60b083b2ef0a92, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF