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MCP4151T-103E

Microchip Tech · Digital Potentiometers · SOIC-8

MCP4151T-103E from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS input SPI chip select input; forcing it to VIL enables serial commands and forcing it to VIHH enables high-voltage serial commands.
2 SCK input SPI clock input, high-voltage tolerant with Schmitt trigger and internal weak pull-up.
3 SDI/SDO bidirectional Multiplexed SPI serial data input/output on the MCP41X1; it drives read data after a valid Read command's first 6 bits, and the SDO is open drain using the internal pull-up.
4 VSS power_in Device ground reference.
5 P0A passive Potentiometer 0 terminal A, the fixed Full-Scale wiper connection, with voltage that must be between VSS and VDD.
6 P0W passive Potentiometer 0 wiper terminal, the adjustable terminal, with voltage that must be between VSS and VDD.
7 P0B passive Potentiometer 0 terminal B, the fixed Zero Scale wiper connection (wiper value 0x00), with voltage that must be between VSS and VDD.
8 VDD power_in Positive power supply input relative to VSS; device operates from 1.8V to 5.5V, with characteristics specified from 2.7V to 5.5V.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8
Category ADC/DAC/Data Conversion
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VDD 2.7 5.5 V 4
Supply Voltage (serial interface only) VDD 1.8 2.7 V Serial Interface only. 4
Nominal Resistance -103 (±20%) RAB 8 10 12 kΩ -103 devices (Note 1) 5
Resistance tolerance -20 20 % RAB 5
VDD Start Voltage to ensure Wiper Reset VBOR 1.65 V RAM retention voltage (VRAM) < VBOR 4
Delay after device exits the reset state TBORD 10 20 µs VDD > VBOR 4
Supply Current, serial interface active IDD 450 µA Serial Interface Active, VDD = 5.5V, CS = VIL, SCK @ 5 MHz, write all 0's to volatile Wiper 0 (address 0h) 4
Supply Current, serial interface inactive IDD 2.5 5 µA Serial Interface Inactive, CS = VIH, VDD = 5.5V 4
Supply Current, high-voltage active IDD 0.55 1 mA Serial Interface Active, VDD = 5.5V, CS = VIHH, SCK @ 5 MHz, decrement volatile Wiper 0 (address 0h) 4
Wiper Resistance RW 75 160 Ω VDD = 5.5 V, IW = 2.0 mA, code = 00h 5
Wiper Resistance RW 75 300 Ω VDD = 2.7 V, IW = 2.0 mA, code = 00h 5
Nominal Resistance Tempco ΔRAB/ΔT 50 ppm/°C TA = -20°C to +70°C 5
Nominal Resistance Tempco ΔRAB/ΔT 100 ppm/°C TA = -40°C to +85°C 5
Nominal Resistance Tempco ΔRAB/ΔT 150 ppm/°C TA = -40°C to +125°C 5
Ratiometric Tempco ΔVWB/ΔT 15 ppm/°C Code = Midscale (80h or 40h) 5
Resistor Terminal Input Voltage Range VA,VW,VB 0 5.5 V VSS to VDD; Note 5, Note 6 5
Maximum current through A, W or B IW 2.5 mA Note 6, worst case current through wiper when wiper is either Full-Scale or Zero Scale. 5
Leakage current into A, W or B IWL 100 nA MCP4XX1 PxA = PxW = PxB = VSS 5
Full-Scale Error 10 kΩ 8-bit VWFSE -3.5 -0.1 LSb 10 kΩ 8-bit 3.0V ≤ VDD ≤ 5.5V 6
Zero-Scale Error 10 kΩ 8-bit VWZSE 0.1 3.5 LSb 10 kΩ 8-bit 3.0V ≤ VDD ≤ 5.5V 6
Potentiometer INL 8-bit INL -1 0.5 1 LSb 8-bit 3.0V ≤ VDD ≤ 5.5V MCP4XX1 devices only (Note 2) 6
Potentiometer DNL 8-bit DNL -0.5 0.25 0.5 LSb 8-bit 3.0V ≤ VDD ≤ 5.5V MCP4XX1 devices only (Note 2) 6
Bandwidth -3 dB 10 kΩ 8-bit BW 1 MHz 10 kΩ 8-bit Code = 80h, load = 30 pF 6
Rheostat INL 10 kΩ 8-bit R-INL -1.5 0.5 1.5 LSb 10 kΩ 8-bit 5.5V, IW = 450 µA 7
Rheostat INL 10 kΩ 8-bit R-INL -5.5 2.5 5.5 LSb 10 kΩ 8-bit 3.0V, IW = 240 µA (Note 7) 7
Rheostat DNL 10 kΩ 8-bit R-DNL -0.5 0.25 0.5 LSb 10 kΩ 8-bit 5.5V, IW = 450 µA 8
Rheostat DNL 10 kΩ 8-bit R-DNL -1 0.25 1 LSb 10 kΩ 8-bit 3.0V (Note 7) 8
Capacitance (PA) CAW 75 pF f =1 MHz, Code = Full-Scale 8
Capacitance (PW) CW 120 pF f =1 MHz, Code = Full-Scale 8
Capacitance (PB) CBW 75 pF f =1 MHz, Code = Full-Scale 8
Schmitt Trigger High Input Threshold VIH 0.45 V 2.7V ≤ VDD ≤ 5.5V; min is 0.45 VDD 9
Schmitt Trigger High Input Threshold VIH 0.5 V 1.8V ≤ VDD ≤ 2.7V; min is 0.5 VDD 9
Schmitt Trigger Low Input Threshold VIL 0.2 V max is 0.2VDD 9
High Voltage Limit VMAX 12.5 V Pin can tolerate VMAX or less. 9
Output Low Voltage (SDO) VOL 0 0.3 V IOL = 5 mA, VDD = 5.5V; max is 0.3VDD 9
Output High Voltage (SDO) VOH 0.7 V IOH = -2.5 mA, VDD = 5.5V; min is 0.7VDD 9
Weak Pull-up/Pull-down Current IPU 1.75 mA Internal VDD pull-up, VIHH pull-down, VDD = 5.5V, VCS = 12.5V 9
CS Pull-up/Pull-down Resistance RCS 16 kΩ VDD = 5.5V, VCS = 3V 9
Input Leakage Current IIL -1 1 µA VIN = VDD and VIN = VSS 9
Pin Capacitance CIN, COUT 10 pF fC = 20 MHz 9
Power Supply Sensitivity 8-bit PSS 0.0015 0.0035 %/% VDD = 2.7V to 5.5V, VA = 2.7V, Code = 80h (MCP41X2/MCP42X2 only) 10
SCK Input Frequency FSCK 10 MHz VDD = 2.7V to 5.5V 11
SCK Input Frequency FSCK 1 MHz VDD = 1.8V to 2.7V 11
CS Active to SCK↑ TcsA2scH 60 ns 11
SCK input high time TscH 45 ns VDD = 2.7V to 5.5V 11
SCK input low time TscL 45 ns VDD = 2.7V to 5.5V 11
Setup time of SDI to SCK↑ TDIV2scH 10 ns 11
Hold time of SDI from SCK↑ TscH2DIL 20 ns 11
SDO data output valid after SCK↓ TscL2DOV 70 ns VDD = 2.7V to 5.5V 11
Voltage on VDD with respect to VSS VDD -0.6 7 V 3
Voltage on CS, SCK, SDI, SDI/SDO, SHDN with respect to VSS -0.6 12.5 V 3
Maximum current into PXA, PXW & PXB pins -2.5 2.5 mA 3
Storage temperature -65 150 °C 3
Ambient temperature with power applied -40 125 °C 3
Maximum Junction Temperature TJ 150 °C 3
Operating Temperature Range TA -40 125 °C 14
Thermal Resistance, 8L-SOIC θJA 149.5 °C/W 14

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin P = Plastic Dual In-line (PDIP) (300 mil), 8/14-lead SN = Plastic Small Outline (SOIC), (150 mil), 8-lead 85

CAD (KiCad official)

  • Symbol: MCP4151T-103E
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: mcp4151t-103e-etched.step / mcp4151t-103e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp4151t-103e.step / mcp4151t-103e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (88 pp, sha256 6c60b083b2ef0a92, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF