component
MCP4151-503E
Public Made by Adomby adom
Microchip Tech Digital Potentiometers, PDIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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MCP4151-503E
Microchip Tech · Digital Potentiometers · PDIP-8
MCP4151-503E from Microchip Tech, in a PDIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS | input | Chip select input; forcing CS to VIL enables the serial commands and forcing it to VIHH enables the high-voltage serial commands. |
| 2 | SCK | input | SPI clock input, supporting up to 10 MHz in SPI modes 0,0 and 1,1. |
| 3 | SDI/SDO | bidirectional | On the MCP41X1 the SDI and SDO functions are multiplexed on this pin, which becomes an SDO output to drive read data after the first 6 command bits are received. |
| 4 | VSS | power_in | Device ground reference for the device. |
| 5 | P0A | passive | Potentiometer terminal A, connected to the full-scale wiper value (0x100 for 8-bit devices), with voltage required to stay between VSS and VDD. |
| 6 | P0W | passive | Potentiometer wiper terminal, the adjustable terminal of the digital potentiometer, with voltage required to stay between VSS and VDD. |
| 7 | P0B | passive | Potentiometer terminal B, connected to the zero-scale wiper value (0x00), with voltage required to stay between VSS and VDD. |
| 8 | VDD | power_in | Positive power supply input relative to VSS; electrical performance may not meet specifications while VDD is below 2.7V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | PDIP-8 |
| Category | ADC/DAC/Data Conversion |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Nominal resistance tolerance | RAB | -20 | 20 | % | Resistance (±20%), -503 devices | 5 | |
| Supply voltage | VDD | 2.7 | 5.5 | V | Device characteristics specified | 4 | |
| Supply voltage serial interface only | VDD | 1.8 | 2.7 | V | Serial Interface only | 4 | |
| Maximum terminal voltage (VHV) for CS, SCK, SDI, SDO, SHDN | VHV | 12.5 | V | VDD ≥ 4.5V | 4 | ||
| Supply current, serial interface active (SCK 5 MHz) | IDD | 450 | µA | Serial Interface Active, VDD = 5.5V, CS = VIL, SCK @ 5 MHz, write all 0's to volatile Wiper 0 | 4 | ||
| Supply current, serial interface active (CS = VIHH) | IDD | 0.55 | 1 | mA | Serial Interface Active, VDD = 5.5V, CS = VIHH, SCK @ 5 MHz, decrement volatile Wiper 0 | 4 | |
| Supply current, serial interface inactive | IDD | 2.5 | 5 | µA | Serial Interface Inactive, CS = VIH, VDD = 5.5V | 4 | |
| VDD start voltage to ensure wiper reset (BOR) | VBOR | 1.65 | V | RAM retention voltage (VRAM) < VBOR | 4 | ||
| Delay after device exits reset state (VDD > VBOR) | TBORD | 10 | 20 | µs | Delay after device exits the reset state (VDD > VBOR) | 4 | |
| Maximum current through A, W or B | IW | 2.5 | mA | Worst case current through wiper when wiper is either Full-Scale or Zero Scale | 5 | ||
| Wiper resistance | RW | 75 | 160 | Ω | VDD = 5.5 V, IW = 2.0 mA, code = 00h | 5 | |
| Wiper resistance | RW | 75 | 300 | Ω | VDD = 2.7 V, IW = 2.0 mA, code = 00h | 5 | |
| Full-scale error (8-bit, 50 kΩ) | VWFSE | -0.8 | -0.1 | LSb | 50 kΩ 8-bit 3.0V ≤ VDD ≤ 5.5V | 6 | |
| Zero-scale error (8-bit, 50 kΩ) | VWZSE | 0.1 | 0.8 | LSb | 50 kΩ 8-bit 3.0V ≤ VDD ≤ 5.5V | 6 | |
| Potentiometer integral non-linearity (8-bit) | INL | -1 | 0.5 | 1 | LSb | 8-bit 3.0V ≤ VDD ≤ 5.5V, MCP4XX1 devices only | 6 |
| Potentiometer differential non-linearity (8-bit) | DNL | -0.5 | 0.25 | 0.5 | LSb | 8-bit 3.0V ≤ VDD ≤ 5.5V, MCP4XX1 devices only | 6 |
| Rheostat integral non-linearity (50 kΩ, 8-bit) | R-INL | -1.5 | 0.5 | 1.5 | LSb | 50 kΩ 8-bit 5.5V, IW = 90 µA | 7 |
| Rheostat integral non-linearity (50 kΩ, 8-bit) | R-INL | -2 | 1 | 2 | LSb | 50 kΩ 8-bit 3.0V, IW = 48 µA (Note 7) | 7 |
| Rheostat differential non-linearity (50 kΩ, 8-bit) | R-DNL | -0.5 | 0.25 | 0.5 | LSb | 50 kΩ 8-bit 5.5V, IW = 90 µA | 8 |
| Schmitt trigger high input threshold | VIH | 0.45 | ×VDD | 2.7V ≤ VDD ≤ 5.5V | 9 | ||
| Schmitt trigger high input threshold | VIH | 0.5 | ×VDD | 1.8V ≤ VDD ≤ 2.7V | 9 | ||
| Schmitt trigger low input threshold | VIL | 0.2 | ×VDD | 9 | |||
| Schmitt trigger hysteresis | VHYS | 0.1 | ×VDD | 9 | |||
| High voltage limit | VMAX | 12.5 | V | Pin can tolerate VMAX or less | 9 | ||
| Output low voltage (SDO) | VOL | 0.3 | ×VDD | IOL = 5 mA, VDD = 5.5V | 9 | ||
| Output high voltage (SDO) | VOH | 0.7 | ×VDD | IOH = -2.5 mA, VDD = 5.5V | 9 | ||
| Weak pull-up / pull-down current | IPU | 1.75 | mA | Internal VDD pull-up, VIHH pull-down, VDD = 5.5V, VCS = 12.5V | 9 | ||
| Input leakage current | IIL | -1 | 1 | µA | VIN = VDD and VIN = VSS | 9 | |
| CS pull-up/pull-down resistance | RCS | 16 | kΩ | VDD = 5.5V, VCS = 3V | 9 | ||
| Pin capacitance | CIN, COUT | 10 | pF | fC = 20 MHz | 9 | ||
| SCK input frequency | FSCK | 10 | MHz | VDD = 2.7V to 5.5V | 11 | ||
| SCK input frequency | FSCK | 1 | MHz | VDD = 1.8V to 2.7V | 11 | ||
| CS active to SCK↑ input | TcsA2scH | 60 | ns | 11 | |||
| SCK input high time | TscH | 45 | ns | VDD = 2.7V to 5.5V | 11 | ||
| SCK input low time | TscL | 45 | ns | VDD = 2.7V to 5.5V | 11 | ||
| Setup time of SDI input to SCK↑ edge | TDIV2scH | 10 | ns | 11 | |||
| Hold time of SDI input from SCK↑ edge | TscH2DIL | 20 | ns | 11 | |||
| CS inactive to SDO output hi-impedance | TcsH2DOZ | 50 | ns | Note 1 | 11 | ||
| SDO data output valid after SCK↓ edge | TscL2DOV | 70 | ns | VDD = 2.7V to 5.5V | 11 | ||
| CS inactive after SCK↑ edge | TscH2csI | 100 | ns | VDD = 2.7V to 5.5V | 11 | ||
| Hold time of CS inactive to CS active | TcsA2csI | 50 | ns | 11 | |||
| Specified temperature range | TA | -40 | 125 | °C | 14 | ||
| Operating temperature range | TA | -40 | 125 | °C | 14 | ||
| Storage temperature range | TA | -65 | 150 | °C | 14 | ||
| Thermal resistance, 8L-PDIP | θJA | 89.3 | °C/W | 14 | |||
| Voltage on VDD with respect to VSS | VDD | -0.6 | 7 | V | 3 | ||
| Voltage on CS, SCK, SDI, SDI/SDO and SHDN with respect to VSS | -0.6 | 12.5 | V | 3 | |||
| Voltage on all other pins (PxA, PxW, PxB, SDO) with respect to VSS | -0.3 | V | VDD + 0.3V upper bound as printed | 3 | |||
| Input clamp current | IIK | -20 | 20 | mA | VI < 0, VI > VDD, VI > VPP ON HV pins | 3 | |
| Output clamp current | IOK | -20 | 20 | mA | VO < 0 or VO > VDD | 3 | |
| Maximum output current sunk by any output pin | 25 | mA | 3 | ||||
| Maximum output current sourced by any output pin | 25 | mA | 3 | ||||
| Maximum current out of VSS pin | 100 | mA | 3 | ||||
| Maximum current into VDD pin | 100 | mA | 3 | ||||
| Maximum current into PXA, PXW and PXB pins | -2.5 | 2.5 | mA | 3 | |||
| Ambient temperature with power applied | -40 | 125 | °C | 3 | |||
| Soldering temperature of leads (10 seconds) | 300 | °C | 3 | ||||
| Maximum junction temperature | TJ | 150 | °C | 3 | |||
| Nominal resistance tempco | ΔRAB/ΔT | 50 | ppm/°C | TA = -20°C to +70°C | 5 | ||
| Nominal resistance tempco | ΔRAB/ΔT | 100 | ppm/°C | TA = -40°C to +85°C | 5 | ||
| Nominal resistance tempco | ΔRAB/ΔT | 150 | ppm/°C | TA = -40°C to +125°C | 5 | ||
| Ratiometric tempco | ΔVWB/ΔT | 15 | ppm/°C | Code = Midscale (80h or 40h) | 5 | ||
| Resistance (50 kΩ device) | RAB | 50 | kΩ | -503 devices, nominal | 5 | ||
| Resistor terminal input voltage range (A, B, W) | VA, VW, VB | 0 | 5.5 | V | VSS to VDD, Note 5, Note 6 | 5 | |
| Leakage current into A, W or B | IWL | 100 | nA | MCP4XX1 PxA = PxW = PxB = VSS | 5 | ||
| Bandwidth -3 dB (50 kΩ, 8-bit) | BW | 200 | kHz | 50 kΩ 8-bit Code = 80h, load = 30 pF | 6 | ||
| Capacitance (PA) | CAW | 75 | pF | f = 1 MHz, Code = Full-Scale | 8 | ||
| Capacitance (PW) | CW | 120 | pF | f = 1 MHz, Code = Full-Scale | 8 | ||
| Capacitance (PB) | CBW | 75 | pF | f = 1 MHz, Code = Full-Scale | 8 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | P = Plastic Dual In-line (PDIP) (300 mil), 8/14-lead SN = Plastic Small Outline (SOIC), (150 mil), 8-lead | 85 |
CAD (KiCad official)
- Symbol:
MCP4151-503E - Footprint:
Package_DIP:DIP-8_W7.62mm - 3D model: PDIP-8 (KiCad packages3D, STEP)
- 3D model files:
mcp4151-503e-etched.step/mcp4151-503e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp4151-503e.step/mcp4151-503e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (88 pp, sha256
6c60b083b2ef0a92, retrieved 2026-11-02, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).