component
MCP4151-502E
Public Made by Adomby adom
Microchip Tech Digital Potentiometers, PDIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Contents
README
markdownMCP4151-502E
Microchip Tech · Digital Potentiometers · PDIP-8
MCP4151-502E from Microchip Tech, in a PDIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS | input | SPI chip select input; forcing it to VIL enables serial commands and forcing it to VIHH enables high-voltage serial commands (high-voltage tolerant Schmitt-trigger input with weak pull-up). |
| 2 | SCK | input | SPI clock input (high-voltage tolerant Schmitt-trigger input with weak pull-up, up to 10 MHz SPI modes 0,0 and 1,1). |
| 3 | SDI/SDO | bidirectional | Multiplexed SPI serial data input/output; after the first 6 address/command bits a valid read command makes the pin drive read data as an open-drain output using the internal smart pull-up, so the host SDO must be protected from drive conflict. |
| 4 | VSS | power_in | Device ground reference. |
| 5 | P0A | passive | Potentiometer 0 terminal A, the fixed full-scale connection (wiper value 0x100 for 8-bit); voltage must be between VSS and VDD and it has no polarity relative to W or B. |
| 6 | P0W | passive | Potentiometer 0 wiper terminal, the adjustable terminal; voltage must be between VSS and VDD and it has no polarity relative to A or B. |
| 7 | P0B | passive | Potentiometer 0 terminal B, the fixed zero-scale connection (wiper value 0x00); voltage must be between VSS and VDD and it has no polarity relative to W or A. |
| 8 | VDD | power_in | Positive power supply input relative to VSS; device operates from 1.8V to 5.5V, with characteristics specified at 2.7V to 5.5V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | PDIP-8 |
| Category | ADC/DAC/Data Conversion |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Nominal resistance RAB (-502) | RAB | 4 | 5 | 6 | kΩ | -502 devices (Note 1) | 5 |
| Resistance tolerance | RAB | -20 | 20 | % | Resistance (± 20%) | 5 | |
| Supply voltage | VDD | 2.7 | 5.5 | V | 4 | ||
| Supply voltage, serial interface only | VDD | 1.8 | 2.7 | V | Serial Interface only | 4 | |
| Operating temperature | TA | -40 | 125 | °C | Operating Temperature Range | 14 | |
| Specified temperature range | TA | -40 | 125 | °C | Specified Temperature Range | 14 | |
| VDD voltage | VDD | -0.6 | 7 | V | with respect to VSS | 3 | |
| Voltage on CS, SCK, SDI, SDI/SDO, SHDN | -0.6 | 12.5 | V | with respect to VSS | 3 | ||
| Voltage on PxA, PxW, PxB, SDO | -0.3 | V | -0.3V to VDD + 0.3V with respect to VSS | 3 | |||
| Input clamp current | IIK | -20 | 20 | mA | VI < 0, VI > VDD, VI > VPP on HV pins | 3 | |
| Output clamp current | IOK | -20 | 20 | mA | VO < 0 or VO > VDD | 3 | |
| Max output current sunk by any output pin | 25 | mA | 3 | ||||
| Max output current sourced by any output pin | 25 | mA | 3 | ||||
| Max current out of VSS pin | 100 | mA | 3 | ||||
| Max current into VDD pin | 100 | mA | 3 | ||||
| Max current into PxA, PxW, PxB pins | -2.5 | 2.5 | mA | 3 | |||
| Storage temperature | -65 | 150 | °C | 3 | |||
| Ambient temperature with power applied | -40 | 125 | °C | 3 | |||
| Soldering temperature of leads | 300 | °C | 10 seconds | 3 | |||
| Maximum junction temperature | TJ | 150 | °C | 3 | |||
| ESD protection (HBM) | 4 | kV | all pins, ≥ 4 kV (HBM) | 3 | |||
| ESD protection (MM) | 300 | V | all pins, ≥ 300V (MM) | 3 | |||
| CS, SDI, SDO, SCK, SHDN voltage range | VHV | 12.5 | V | VDD ≥ 4.5V, from VSS | 4 | ||
| VDD start voltage to ensure wiper reset | VBOR | 1.65 | V | RAM retention voltage (VRAM) < VBOR | 4 | ||
| Delay after device exits reset state | TBORD | 10 | 20 | µs | VDD > VBOR | 4 | |
| Supply current, serial interface active | IDD | 450 | µA | VDD = 5.5V, CS = VIL, SCK @ 5 MHz, write all 0's to volatile Wiper 0 | 4 | ||
| Supply current, serial interface inactive | IDD | 2.5 | 5 | µA | CS = VIH, VDD = 5.5V | 4 | |
| Supply current, serial interface active (VIHH) | IDD | 0.55 | 1 | mA | VDD = 5.5V, CS = VIHH, SCK @ 5 MHz, decrement volatile Wiper 0 | 4 | |
| Wiper resistance | RW | 75 | 160 | Ω | VDD = 5.5 V, IW = 2.0 mA, code = 00h | 5 | |
| Wiper resistance | RW | 75 | 300 | Ω | VDD = 2.7 V, IW = 2.0 mA, code = 00h | 5 | |
| Resistor terminal input voltage range | VA,VW,VB | 0 | V | VSS to VDD, Note 5, Note 6 | 5 | ||
| Maximum current through A, W or B | IW | 2.5 | mA | Note 6, worst case current through wiper at Full-Scale or Zero Scale | 5 | ||
| Full-scale error 5 kΩ 8-bit | VWFSE | -6 | -0.1 | LSb | 5 kΩ 8-bit 3.0V ≤ VDD ≤ 5.5V | 6 | |
| Zero-scale error 5 kΩ 8-bit | VWZSE | 0.1 | 6 | LSb | 5 kΩ 8-bit 3.0V ≤ VDD ≤ 5.5V | 6 | |
| Potentiometer INL 8-bit | INL | -1 | 0.5 | 1 | LSb | 8-bit 3.0V ≤ VDD ≤ 5.5V, MCP4XX1 only (Note 2) | 6 |
| Potentiometer DNL 8-bit | DNL | -0.5 | 0.25 | 0.5 | LSb | 8-bit 3.0V ≤ VDD ≤ 5.5V, MCP4XX1 only (Note 2) | 6 |
| Schmitt trigger high input threshold | VIH | 0.45 | ×VDD | 2.7V ≤ VDD ≤ 5.5V | 9 | ||
| Schmitt trigger high input threshold | VIH | 0.5 | ×VDD | 1.8V ≤ VDD ≤ 2.7V | 9 | ||
| Schmitt trigger low input threshold | VIL | 0.2 | ×VDD | 9 | |||
| High voltage limit | VMAX | 12.5 | V | Pin can tolerate VMAX or less (Note 6) | 9 | ||
| Weak pull-up/pull-down current | IPU | 1.75 | mA | Internal VDD pull-up, VIHH pull-down, VDD = 5.5V, VCS = 12.5V | 9 | ||
| Input leakage current | IIL | -1 | 1 | µA | VIN = VDD and VIN = VSS | 9 | |
| SCK input frequency | FSCK | 10 | MHz | VDD = 2.7V to 5.5V | 11 | ||
| SCK input frequency | FSCK | 1 | MHz | VDD = 1.8V to 2.7V | 11 | ||
| SCK input high time | TscH | 45 | ns | VDD = 2.7V to 5.5V | 11 | ||
| SCK input low time | TscL | 45 | ns | VDD = 2.7V to 5.5V | 11 | ||
| Setup time of SDI to SCK↑ | TDIV2scH | 10 | ns | 11 | |||
| Hold time of SDI from SCK↑ | TscH2DIL | 20 | ns | 11 | |||
| Thermal resistance, 8L-PDIP | θJA | 89.3 | °C/W | 14 | |||
| Nominal resistance tempco | ΔRAB/ΔT | 50 | ppm/°C | TA = -20°C to +70°C | 5 | ||
| Nominal resistance tempco | ΔRAB/ΔT | 100 | ppm/°C | TA = -40°C to +85°C | 5 | ||
| Nominal resistance tempco | ΔRAB/ΔT | 150 | ppm/°C | TA = -40°C to +125°C | 5 | ||
| Ratiometric tempco | ΔVWB/ΔT | 15 | ppm/°C | Code = Midscale (80h or 40h) | 5 | ||
| Leakage current into A, W or B | IWL | 100 | nA | MCP4XX1 PxA = PxW = PxB = VSS | 5 | ||
| Bandwidth -3 dB 5 kΩ 8-bit | BW | 2 | MHz | 5 kΩ 8-bit Code = 80h, load = 30 pF | 6 | ||
| Capacitance (PW) | CW | 120 | pF | f = 1 MHz, Code = Full-Scale | 8 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | P = Plastic Dual In-line (PDIP) (300 mil), 8/14-lead SN = Plastic Small Outline (SOIC), (150 mil), 8-lead | 85 |
CAD (KiCad official)
- Symbol:
MCP4151-502E - Footprint:
Package_DIP:DIP-8_W7.62mm - 3D model: PDIP-8 (KiCad packages3D, STEP)
- 3D model files:
mcp4151-502e-etched.step/mcp4151-502e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp4151-502e.step/mcp4151-502e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (88 pp, sha256
6c60b083b2ef0a92, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).