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MCP4012T-502E
Public Made by Adomby adom
Microchip Tech Digital Potentiometers, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownMCP4012T-502E
Microchip Tech · Digital Potentiometers · SOT-23-6
MCP4012T-502E from Microchip Tech, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Positive power supply input, relative to VSS, ranging from 1.8V to 5.5V, with a decoupling capacitor to VSS recommended. |
| 2 | VSS | power_in | Device ground reference. |
| 3 | U/D | input | TTL-compatible Increment/Decrement input; an increment moves the wiper one step toward terminal A and a decrement moves it one step toward terminal B. |
| 4 | CS | input | TTL-compatible chip select input with internal pull-up; VIL enables serial commands and VIHH enables the high-voltage serial commands compatible with MCP402X devices. |
| 5 | W | passive | Potentiometer wiper terminal, the adjustable terminal, with no polarity relative to A or B and a voltage that must be between VSS and VDD. |
| 6 | A | passive | Potentiometer terminal A, the fixed connection to the 0x3F end, with no polarity and a voltage that must be between VSS and VDD. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOT-23-6 |
| Category | ADC/DAC/Data Conversion |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Voltage Range (resistor characteristics) | VDD | 2.7 | 5.5 | V | 2 | ||
| Operating Voltage (device operation) | VDD | 1.8 | V | VDD = 1.8V, CS:VIHH = 8.5V, VIH = 1.8V, VIL = 0V, U/D:VIH = 1.8V, VIL = 0V | 2 | ||
| CS Input Voltage | VCS | 12.5 | V | CS pin at one of three input levels (VIL, VIH or VIHH); by design | 2 | ||
| Supply Current | IDD | 45 | µA | 5.5V, CS = VSS, fU/D = 1 MHz | 2 | ||
| Supply Current | IDD | 15 | µA | 2.7V, CS = VSS, fU/D = 1 MHz | 2 | ||
| Supply Current, serial interface inactive | IDD | 0.3 | 1 | µA | CS = VIH, U/D = VIH | 2 | |
| Resistance (A to B), -502 device | RAB | 4 | 5 | 6 | kΩ | -502 devices (±20%) | 2 |
| Wiper Resistance | RW | 70 | 125 | Ω | 5.5V | 3 | |
| Wiper Resistance | RW | 70 | 325 | Ω | 2.7V | 3 | |
| Rheostat INL | R-INL | -0.5 | 0.25 | 0.5 | LSb | -502 devices (5 kΩ), 5.5V | 4 |
| Rheostat INL | R-INL | -5.5 | 2.5 | 5.5 | LSb | -502 devices (5 kΩ), 2.7V (Note 7) | 4 |
| Rheostat DNL | R-DNL | -0.5 | 0.25 | 0.5 | LSb | -502 devices (5 kΩ), 5.5V | 4 |
| Rheostat DNL | R-DNL | -1 | 0.25 | 1.25 | LSb | -502 devices (5 kΩ), 2.7V (Note 7) | 4 |
| Current through A, W or B | IW | 2.5 | mA | by design | 3 | ||
| High-Voltage Input Entry Voltage | VIHH | 8.5 | 12.5 | V | +7°C to +125°C | 5 | |
| High-Voltage Input Entry Voltage | VIHH | 9 | 12.5 | V | -40°C to +125°C | 5 | |
| Input Leakage Current | IIL | -1 | 1 | µA | VIN = VDD | 5 | |
| CS Low Time | tCSLO | 5 | µs | 6 | |||
| CS High Time | tCSHI | 500 | ns | 2.7V ≤ VDD ≤ 5.5V | 6 | ||
| U/D to CS Hold Time | tLUC | 500 | ns | 2.7V ≤ VDD ≤ 5.5V | 6 | ||
| U/D to CS Hold Time | tLUC | 750 | ns | 1.8V ≤ VDD < 2.7V | 6 | ||
| CS to U/D Low Setup Time | tLCUF | 500 | ns | 6 | |||
| CS to U/D High Setup Time | tLCUR | 3 | µs | 6 | |||
| U/D High Time | tHI | 500 | ns | 6 | |||
| U/D Low Time | tLO | 500 | ns | 6 | |||
| Up/Down Toggle Frequency | fUD | 1 | MHz | 6 | |||
| Wiper Settling Time | tS | 1 | µs | 5 kΩ, CL = 100 pF | 6 | ||
| HV U/D to CS Hold Time | tHUC | 1.5 | µs | 8 | |||
| HV CS to U/D Low Setup Time | tHCUF | 8 | µs | 8 | |||
| HV CS to U/D High Setup Time | tHCUR | 4.5 | µs | 8 | |||
| Specified Temperature Range | TA | -40 | 125 | °C | 10 | ||
| Storage Temperature Range | TA | -65 | 150 | °C | 10 | ||
| Supply voltage | VDD | 6.5 | V | 2 | |||
| CS and U/D inputs w.r.t VSS | -0.3 | 12.5 | V | 2 | |||
| Current at Input Pins | -10 | 10 | mA | 2 | |||
| Current at Supply Pins | -10 | 10 | mA | 2 | |||
| Current at Potentiometer Pins | -2.5 | 2.5 | mA | 2 | |||
| Storage temperature | -65 | 150 | °C | 2 | |||
| Ambient temp. with power applied | -55 | 125 | °C | 2 | |||
| Maximum Junction Temperature | TJ | 150 | °C | 2 | |||
| Thermal Resistance, 6L-SOT-23 | θJA | 120 | °C/W | 10 | |||
| Step Resistance (-502E) | RS | 79.37 | Ω | MCP401X-502E typical step resistance | 38 | ||
| Nominal Resistance Tempco | ΔR/ΔT | 50 | ppm/°C | TA = -20°C to +70°C | 3 | ||
| Nominal Resistance Tempco | ΔR/ΔT | 100 | ppm/°C | TA = -40°C to +85°C | 3 | ||
| Nominal Resistance Tempco | ΔR/ΔT | 150 | ppm/°C | TA = -40°C to +125°C | 3 | ||
| Bandwidth -3 dB | BW | 2 | MHz | -502 devices, Code = 1F, output load = 30 pF | 3 | ||
| Capacitance (PA) | CAW | 75 | pF | f =1 MHz, code = 1Fh | 3 | ||
| Capacitance (PW) | CW | 120 | pF | f =1 MHz, code = 1Fh | 3 | ||
| Capacitance (PB) | CBW | 75 | pF | f =1 MHz, code = 1Fh | 3 | ||
| Leakage current into A, W or B | IWL | 100 | nA | MCP4012/13 A = W = VSS | 3 | ||
| CS Pull-Up/Pull-Down Resistance | RCS | 16 | kΩ | VDD = 5.5V, VCS = 3V | 5 | ||
| CS Weak Pull-Up/Pull-Down Current | IPU | 170 | µA | VDD = 5.5V, VCS = 3V | 5 | ||
| CS and U/D Pin Capacitance | CIN, COUT | 10 | pF | fC = 1 MHz, VDD ≥ 2.7V | 5 | ||
| Wiper Response on Power-Up | tPU | 200 | ns | 6 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC] A A2 | 61 |
CAD (KiCad official)
- Symbol:
MCP4012T-502E - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
mcp4012t-502e-etched.step/mcp4012t-502e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp4012t-502e.step/mcp4012t-502e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (70 pp, sha256
cf4f63c0d7bd1cd8, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).