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MCP39F511A-E

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Microchip Tech Battery Management ICs, QFN-28(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Symbol & Footprint

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Contents

README

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MCP39F511A-E

Microchip Tech · Battery Management ICs · QFN-28(5x5)

MCP39F511A-E from Microchip Tech, in a QFN-28(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 EVENT1 output Event 1 output pin, configurable as an output flag based on internal raise conditions via the Event Configuration register.
2 NC unconnected No connect; must be left floating.
3 NC unconnected No connect; must be left floating.
4 UART_RX input UART communication receive pin of the asynchronous full-duplex UART (eight bits with Start and Stop bit).
5 COMMONA passive Common pin A, internal connection that must be connected to pin 13 (COMMONB).
6 OSCI input Oscillator crystal connection or external clock input; optional 4 MHz crystal, otherwise device uses internal 4 MHz oscillator.
7 OSCO passive Oscillator crystal connection pin for the optional 4 MHz crystal, with appropriate load capacitance.
8 NC unconnected No connect; must be left floating.
9 NC unconnected No connect; must be left floating.
10 RESET input Active-low Schmitt-triggered reset input that places the Delta-Sigma ADCs, PGA, internal VREF and other AFE blocks in Reset.
11 AVDD power_in Analog power supply pin, to be maintained between +2.7V and +3.6V with 0.1 µF ceramic bypass capacitors recommended.
12 UART_TX output UART communication transmit pin of the asynchronous full-duplex UART.
13 COMMONB passive Common pin B, internal connection that must be connected to pin 5 (COMMONA).
14 PWM output Dedicated PWM output with frequency and duty cycle set by the PWM Frequency and PWM Duty Cycle registers.
15 EVENT2 output Event 2 output pin, configurable as an output flag based on internal raise conditions via the Event Configuration register.
16 I1+ input Noninverting current channel input of the 24-bit Delta-Sigma ADC, with differential range of ±600 mV peak/GAIN at VREF = 1.2V.
17 I1- input Inverting current channel input of the 24-bit Delta-Sigma ADC, with differential range of ±600 mV peak/GAIN at VREF = 1.2V.
18 V1- input Inverting voltage channel input of the 24-bit Delta-Sigma ADC, with differential range of ±600 mV peak/GAIN at VREF = 1.2V.
19 V1+ input Noninverting voltage channel input of the 24-bit Delta-Sigma ADC, with differential range of ±600 mV peak/GAIN at VREF = 1.2V.
20 AN_IN input Analog input to the SAR ADC for temperature measurement (e.g. MCP9700A) or general-purpose use.
21 AGND power_in Analog ground, return path for internal analog circuitry (ADCs, PGA, voltage reference, POR).
22 ZCD output Zero crossing detection logic output with edges at each zero crossing of the voltage channel input.
23 REFIN+/OUT bidirectional Noninverting voltage reference input and internal reference output pin.
24 DGND power_in Digital ground, return path for internal digital circuitry; exposed pad is connected to pins 24 and 27.
25 DVDD power_in Digital power supply pin.
26 MCLR input Master Clear input for the device.
27 DGND power_in Digital ground, return path for internal digital circuitry.
28 DR unconnected Data Ready pin; must be left floating.
29 EP power_in Exposed thermal pad, to be connected to pins 24 and 27 (DGND).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package QFN-28(5x5)
Category Power Supply Chip
Pins 29

CAD (KiCad official)

  • Symbol: MCP39F511A-E
  • Footprint: Package_DFN_QFN:QFN-28-1EP_5x5mm_P0.5mm_EP3.35x3.35mm
  • 3D model: QFN-28(5x5) (KiCad packages3D, STEP)
  • 3D model files: mcp39f511a-e-etched.step / mcp39f511a-e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp39f511a-e.step / mcp39f511a-e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (68 pp, sha256 ffa42d2cb7cceac6, retrieved 2026-10-24, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF