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MCP3918A1-E

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Microchip Tech Energy Metering ICs, QFN-20-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentadc-dac-data conversionmcp3918a1-efactory-2.0.0extractor-text

Changed since verified MCP3918A1-E

by Ray · last 30 Oct 2026 · 1 record · files changed since
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 21 pinschanged since
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: MCP3918A1-E · QFN-20-EP(4x4) · 21 pins
  • ✓copper: 21 copper pads, none touching another net
  • ✓datasheet: all 21 pin names found in the 88-page datasheet
  • •distributor (warn): no ['digikey', 'mouser'] number
  • ✓family: QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-rm__n8g7/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 21 pins = 21 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 21 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files! mcp3918a1-e.kicad_sym✓ mcp3918a1-e.kicad_mod✓ mcp3918a1-e.step
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MCP3918A1-E

Microchip Tech · Energy Metering ICs · QFN-20-EP(4x4)

MCP3918A1-E from Microchip Tech, in a QFN-20-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CH0+ input Noninverting analog input for channel 0; linear range is ±600 mV/GAIN with VREF = 1.2V, and absolute input is ±1V with no distortion (±2V with no breaking) relative to AGND.
2 CH0- input Inverting analog input for channel 0; linear range is ±600 mV/GAIN with VREF = 1.2V, and absolute input is ±1V with no distortion (±2V with no breaking) relative to AGND.
3 NC unconnected Not connected.
4 NC unconnected Not connected.
5 AGND power_in Analog ground, return path for internal analog circuitry; recommended to connect to the same ground node as DGND, preferably with a star connection.
6 REFIN+/OUT bidirectional Noninverting voltage reference input or internal reference output (internal reference enabled when VREFEXT = 0); minimal drive capability, a 0.1 µF ceramic capacitor is sufficient in most cases.
7 REFIN- input Inverting voltage reference input pin.
8 DGND power_in Digital ground, return path for internal digital circuitry.
9 NC unconnected Not connected.
10 MDAT0 output Modulator data output pin for channel 0.
11 DR/GAIN1 bidirectional Active-low data ready output pulse (half a DMCLK period wide) or GAIN1 logic input in Two-Wire mode; can be high-impedance or driven high when inactive per DR_HIZ.
12 OSC1/CLKI/GAIN0 input Oscillator crystal connection, external clock input, or GAIN0 logic input.
13 OSC2/MODE input Oscillator crystal connection or serial interface mode logic input.
14 CS/BOOST input Serial interface chip select input or BOOST logic input.
15 SCK/MCLK input Serial interface clock or master clock input.
16 SDO output Serial interface data output (datasheet table lists it as 'Data Input Pin'); high-impedance during continuous write communication.
17 SDI/OSR1 input Serial interface data input or OSR1 logic input in Two-Wire mode.
18 RESET/OSR0 input Active-low Schmitt-trigger master reset in SPI mode (resets all registers to default) or OSR0 logic input in Two-Wire mode.
19 DVDD power_in Digital power supply, maintained between 2.7V and 3.6V; bypass with typically 10 µF in parallel with 0.1 µF ceramic.
20 AVDD power_in Analog power supply, maintained between 2.7V and 3.6V; bypass with typically 10 µF in parallel with 0.1 µF ceramic.
21 EP passive Exposed thermal pad.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package QFN-20-EP(4x4)
Category ADC/DAC/Data Conversion
Pins 21

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VDD -0.3 4 V 3
Digital inputs and outputs w.r.t. AGND -0.3 4 V 3
Analog input w.r.t. AGND -2 2 V 3
VREF input w.r.t. AGND (min; max is VDD + 0.6V) -0.6 V max printed as VDD + 0.6V 3
Storage temperature -65 150 °C 3
Ambient temperature with power applied -65 125 °C 3
Soldering temperature of leads 300 °C 10 seconds 3
ESD on analog inputs (HBM) 4 kV HBM 3
ESD on analog inputs (MM) 200 V MM 3
Operating voltage, analog AVDD 2.7 3.6 V 5
Operating voltage, digital DVDD 2.7 3.6 V 5
Operating temperature range TA -40 125 °C Notes 1, 2 7
Storage temperature range TA -65 150 °C 7
Resolution (no missing codes) 24 bits OSR = 256 or greater 3
Sampling frequency fS(DMCLK) 1 4 MHz For maximum condition, BOOST[1:0] = 11 3
Output data rate fD(DRCLK) 4 125 ksps For maximum condition, BOOST[1:0] = 11, OSR = 32 3
Analog input absolute voltage on CH0+/- pins CH0+/- -1 1 V All analog input channels measured to AGND 3
Offset error VOS -2 0.2 2 mV Note 5 3
Gain error GE -6 6 % Note 5 3
Differential input impedance ZIN 232 kΩ G = 1, proportional to 1/AMCLK 4
Differential input impedance ZIN 142 kΩ G = 2, proportional to 1/AMCLK 4
Differential input impedance ZIN 72 kΩ G = 4, proportional to 1/AMCLK 4
Differential input impedance ZIN 38 kΩ G = 8, proportional to 1/AMCLK 4
Differential input impedance ZIN 36 kΩ G = 16, proportional to 1/AMCLK 4
Differential input impedance ZIN 33 kΩ G = 32, proportional to 1/AMCLK 4
Signal-to-noise and distortion ratio SINAD 92 93.5 dB Note 2 4
Total harmonic distortion THD -107 -103 dBc Includes the first 35 harmonics 4
Signal-to-noise ratio SNR 92 94 dB Note 2 4
Internal voltage reference tolerance VREF 1.176 1.2 1.224 V VREFEXT = 0, TA = +25°C only 5
Voltage reference input capacitance 10 pF 5
Differential reference input voltage range (VREF+ - VREF-) VREF 1.1 1.3 V VREFEXT = 1 5
Absolute voltage on REFIN- pin VREF- -0.1 0.1 V REFIN- should be connected to AGND when VREFEXT = 0 5
Master clock input frequency range fMCLK 20 MHz CLKEXT = 1 (Note 7) 5
Crystal oscillator operating frequency range fXTAL 1 20 MHz CLKEXT = 0 (Note 7) 5
Analog master clock AMCLK 16 MHz Note 7 5
Operating current, analog IDD,A 0.8 1 mA BOOST[1:0] = 00 (Note 3) 5
Operating current, analog IDD,A 1 1.2 mA BOOST[1:0] = 01 (Note 3) 5
Operating current, analog IDD,A 1.3 1.7 mA BOOST[1:0] = 10 (Note 3) 5
Operating current, analog IDD,A 2.2 2.9 mA BOOST[1:0] = 11 (Note 3) 5
Operating current, digital IDD,D 0.2 0.3 mA MCLK = 4 MHz, proportional to MCLK 6
Shutdown current, analog IDDS,A 1 µA AVDD pin only (Note 4) 6
Shutdown current, digital IDDS,D 2 µA DVDD pin only (Note 4) 6
Input leakage current ILI -1 1 µA CS = DVDD, VIN = DGND to DVDD 6
Output leakage current ILO -1 1 µA CS = DVDD, VOUT = DGND or DVDD 6
Low-level output voltage VOL 0.4 V IOL = +1.7 mA, DVDD = 3.3V 6
Internal capacitance (all inputs and outputs) CINT 7 pF TA = +25°C, SCK = 1.0 MHz, DVDD = 3.3V (Note 2) 6
Serial clock frequency fSCK 20 MHz 7
CS setup time tCSS 25 ns 7
CS hold time tCSH 50 ns 7
CS disable time tCSD 50 ns 7
Data setup time tSU 5 ns 7
Data hold time tHD 10 ns 7
Serial clock high time tHI 20 ns 7
Serial clock low time tLO 20 ns 7
Serial clock delay time tCLD 50 ns 7
Serial clock enable time tCLE 50 ns 7
Output valid from SCK low tDO 25 ns 7
Output hold time tHO 0 ns 7
Output disable time tDIS 25 ns 7
Reset pulse width (RESET) tMCLR 100 ns 7
Data transfer time to DR tDODR 25 ns Note 2 7
Modulator mode entry to modulator data present tMODSU 100 ns 7
Two-wire mode enable time tMODE 50 ns 7
Two-wire mode watchdog timer tWATCH 3.5 35 µs 7
Thermal resistance, 20-lead QFN θJA 46.2 °C/W 7

CAD (KiCad official)

  • Symbol: MCP3918A1-E
  • Footprint: Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm
  • 3D model: QFN-20-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: mcp3918a1-e-etched.step / mcp3918a1-e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp3918a1-e.step / mcp3918a1-e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (88 pp, sha256 b2e73ade8520fcca, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF