component
MCP3428T-E
Public Made by Adomby adom
Microchip Tech Analog To Digital Converters (ADCs), SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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MCP3428T-E
Microchip Tech · Analog To Digital Converters (ADCs) · SOIC-14
MCP3428T-E from Microchip Tech, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CH1+ | input | Positive differential analog input pin of channel 1; the voltage range on each input pin is VSS-0.3V to VDD+0.3V. |
| 2 | CH1- | input | Negative differential analog input pin of channel 1; it can be tied to VSS for single-ended operation, and its voltage range is VSS-0.3V to VDD+0.3V. |
| 3 | CH2+ | input | Positive differential analog input pin of channel 2; the voltage range on each input pin is VSS-0.3V to VDD+0.3V. |
| 4 | CH2- | input | Negative differential analog input pin of channel 2; it can be tied to VSS for single-ended operation, and its voltage range is VSS-0.3V to VDD+0.3V. |
| 5 | VSS | power_in | Ground pin and current return path of the device, to be connected through a low impedance path to the ground plane. |
| 6 | VDD | power_in | Positive supply voltage pin that must be maintained in the 2.7V to 5.5V range for specified operation, with a 0.1 µF ceramic bypass capacitor recommended. |
| 7 | SDA | bidirectional | Bidirectional serial data pin of the I2C interface, an open-drain N-channel driver that needs a pull-up resistor of 5 kΩ to 10 kΩ for standard and fast modes. |
| 8 | SCL | input | Serial clock pin of the I2C interface that accepts only external clocks, an open-drain N-channel driver that needs a pull-up resistor from VDD. |
| 9 | Adr0 | input | I2C address selection pin that sets the device address (see Section 5.3.2). |
| 10 | Adr1 | input | I2C address selection pin that sets the device address (see Section 5.3.2). |
| 11 | CH3+ | input | Positive differential analog input pin of channel 3; the voltage range on each input pin is VSS-0.3V to VDD+0.3V. |
| 12 | CH3- | input | Negative differential analog input pin of channel 3; it can be tied to VSS for single-ended operation, and its voltage range is VSS-0.3V to VDD+0.3V. |
| 13 | CH4+ | input | Positive differential analog input pin of channel 4; the voltage range on each input pin is VSS-0.3V to VDD+0.3V. |
| 14 | CH4- | input | Negative differential analog input pin of channel 4; it can be tied to VSS for single-ended operation, and its voltage range is VSS-0.3V to VDD+0.3V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-14 |
| Category | ADC/DAC/Data Conversion |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage range | VDD | 2.7 | 5.5 | V | 6 | ||
| Specified temperature range | TA | -40 | 85 | °C | 7 | ||
| Operating temperature range | TA | -40 | 125 | °C | 7 | ||
| Supply voltage absolute maximum | VDD | 7 | V | 5 | |||
| Ambient temperature with power applied | TA | -55 | 125 | °C | 5 | ||
| Storage temperature range | TSTG | -65 | 150 | °C | 5 | ||
| Maximum junction temperature | TJ | 150 | °C | 5 | |||
| Current at input pins | -2 | 2 | mA | 5 | |||
| Current at output and supply pins | -10 | 10 | mA | 5 | |||
| Resolution (effective number of bits) 12 bits | 12 | Bits | DR = 240 SPS | 5 | |||
| Resolution (effective number of bits) 14 bits | 14 | Bits | DR = 60 SPS | 5 | |||
| Resolution (effective number of bits) 16 bits | 16 | Bits | DR = 15 SPS | 5 | |||
| Data rate | DR | 176 | 240 | 328 | SPS | 12 bits mode | 5 |
| Data rate | DR | 44 | 60 | 82 | SPS | 14 bits mode | 5 |
| Data rate | DR | 11 | 15 | 20.5 | SPS | 16 bits mode | 5 |
| Supply current during conversion | IDDA | 145 | 180 | µA | VDD = 5.0V | 6 | |
| Supply current during conversion | IDDA | 135 | µA | VDD = 3.0V | 6 | ||
| Supply current during standby mode | IDDS | 0.3 | 1 | µA | VDD = 5.0V | 6 | |
| Supply current when I2C bus line is active | IDDB | 10 | µA | Device is in standby mode while I2C bus is active | 6 | ||
| Input leakage current high | IILH | 1 | µA | VIH = 5.5V | 6 | ||
| Input leakage current low | IILL | -1 | µA | VIL = GND | 6 | ||
| Low level output voltage | VOL | 0.4 | V | IOL = 3 mA | 6 | ||
| Pin capacitance | CPIN | 4 | 10 | pF | 6 | ||
| I2C bus capacitance | Cb | 400 | pF | 6 | |||
| Thermal resistance 14L-SOIC | θJA | 120 | °C/W | 7 | |||
| Internal reference voltage | VREF | 2.048 | V | 5 | |||
| Integral non-linearity | INL | 10 | ppm of FSR | DR = 15 SPS | 5 | ||
| Gain error | 0.1 | % | PGA = 1, DR = 15 SPS | 5 | |||
| PGA gain error match | 0.1 | % | Between any 2 PGA settings | 5 | |||
| Gain error drift | 15 | ppm/°C | PGA=1, DR=15 SPS | 5 | |||
| Output noise | 2.5 | µVRMS | TA = +25°C, DR =15 SPS, PGA = 1, VIN+ = VIN- = GND | 5 | |||
| Common input impedance | ZINC(f) | 25 | MΩ | PGA = 1, 2, 4, 8 | 5 | ||
| Offset error | VOS | 30 | µV | PGA = 1, DR = 15 SPS | 6 | ||
| Offset drift vs. temperature | 50 | nV/°C | 6 | ||||
| Common-mode rejection | 105 | dB | at DC and PGA = 1 | 6 | |||
| Common-mode rejection | 110 | dB | at DC and PGA = 8, TA = +25°C | 6 | |||
| Gain vs. VDD | 5 | ppm/V | TA = +25°C, VDD = 2.7V to 5.5V, PGA = 1 | 6 | |||
| Power supply rejection at DC input | 100 | dB | TA = +25°C, VDD = 2.7V to 5.5V, PGA = 1 | 6 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | MS = Plastic Micro Small Outline (MSOP), 8-lead SN = Plastic Small Outline SOIC, 8-lead | 53 |
CAD (KiCad official)
- Symbol:
MCP3428T-E - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
mcp3428t-e-etched.step/mcp3428t-e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp3428t-e.step/mcp3428t-e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (56 pp, sha256
3d9cc322b8fd7415, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).