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MCP3427-E
Public Made by Adomby adom
Microchip Tech Analog To Digital Converters (ADCs), MSOP-10. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownMCP3427-E
Microchip Tech · Analog To Digital Converters (ADCs) · MSOP-10
MCP3427-E from Microchip Tech, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CH1+ | input | Positive differential analog input of channel 1, with a maximum input range of VSS-0.3V to VDD+0.3V. |
| 2 | CH1- | input | Negative differential analog input of channel 1, which can be tied to VSS for single-ended operation, with a range of VSS-0.3V to VDD+0.3V. |
| 3 | VSS | power_in | Ground pin and current return path, to be connected to a ground plane (preferably analog ground) through a low impedance connection. |
| 4 | CH2+ | input | Positive differential analog input of channel 2, with a maximum input range of VSS-0.3V to VDD+0.3V. |
| 5 | CH2- | input | Negative differential analog input of channel 2, which can be tied to VSS for single-ended operation, with a range of VSS-0.3V to VDD+0.3V. |
| 6 | VDD | power_in | Positive supply, 2.7V to 5.5V for specified operation, bypassed with about 0.1 µF ceramic to ground plus a recommended 10 µF tantalum in parallel. |
| 7 | SDA | bidirectional | Bidirectional open-drain serial data pin of the I2C interface needing a pull-up to VDD (typically 5 kΩ to 10 kΩ for standard/fast mode, under 1 kΩ for high-speed mode). |
| 8 | SCL | input | Open-drain I2C serial clock pin (device is slave only) needing a pull-up to VDD (typically 5 kΩ to 10 kΩ for standard/fast mode, under 1 kΩ for high-speed mode). |
| 9 | Adr0 | input | I2C address selection pin (see Section 5.3.2). |
| 10 | Adr1 | input | I2C address selection pin (see Section 5.3.2). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | MSOP-10 |
| Category | ADC/DAC/Data Conversion |
| Pins | 10 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Data Rate (12 bits mode) | DR | 176 | 240 | 328 | SPS | 12 bits mode | 5 |
| Data Rate (14 bits mode) | DR | 44 | 60 | 82 | SPS | 14 bits mode | 5 |
| Data Rate (16 bits mode) | DR | 11 | 15 | 20.5 | SPS | 16 bits mode | 5 |
| Resolution and No Missing Codes (12 bit) | 12 | Bits | DR = 240 SPS | 5 | |||
| Resolution and No Missing Codes (14 bit) | 14 | Bits | DR = 60 SPS | 5 | |||
| Resolution and No Missing Codes (16 bit) | 16 | Bits | DR = 15 SPS | 5 | |||
| Maximum Input Voltage Range | -0.3 | 0.3 | V | VSS-0.3 min to VDD+0.3 max (Note 1) | 5 | ||
| Supply Voltage Range | VDD | 2.7 | 5.5 | V | 6 | ||
| Supply Current during Conversion (5.0V) | IDDA | 145 | 180 | µA | VDD = 5.0V | 6 | |
| Supply Current during Conversion (3.0V) | IDDA | 135 | µA | VDD = 3.0V | 6 | ||
| Supply Current during Standby Mode | IDDS | 0.3 | 1 | µA | VDD = 5.0V | 6 | |
| High level input voltage | VIH | 0.7 | V | at SDA and SCL pins; min 0.7VDD, max VDD | 6 | ||
| Low level input voltage | VIL | 0.3 | V | at SDA and SCL pins; max 0.3VDD | 6 | ||
| Low level output voltage | VOL | 0.4 | V | IOL = 3 mA | 6 | ||
| Hysteresis of Schmidt Trigger for inputs | VHYST | 0.05 | V | fSCL = 100 kHz; min 0.05VDD | 6 | ||
| Supply Current when I2C bus line is active | IDDB | 10 | µA | Device is in standby mode while I2C bus is active | 6 | ||
| Input Leakage Current (high) | IILH | 1 | µA | VIH = 5.5V | 6 | ||
| Input Leakage Current (low) | IILL | -1 | µA | VIL = GND | 6 | ||
| Addr_Low | Addr_Low | 0 | 0.2 | V | Adr0 and Adr1 pins; VSS min, 0.2VDD max; device reads logic low | 6 | |
| Addr_High | Addr_High | 0.75 | V | Adr0 and Adr1 pins; 0.75VDD min, VDD max; device reads logic high | 6 | ||
| Addr_Float | Addr_Float | 0.35 | 0.6 | V | Read pin voltage if voltage is applied to the address pin; 0.35VDD to 0.6VDD (Note 9) | 6 | |
| Pin capacitance | CPIN | 4 | 10 | pF | 6 | ||
| I2C Bus Capacitance | Cb | 400 | pF | 6 | |||
| Differential Full Scale Input Voltage Range | FSR | 2.048 | V | ±2.048/PGA; VIN = [CHn+ - CHn-] | 5 | ||
| Differential Input Impedance | ZIND | 2.25 | MΩ | 2.25/PGA; During normal mode operation (Note 2) | 5 | ||
| Common Mode input Impedance | ZINC | 25 | MΩ | PGA = 1, 2, 4, 8 | 5 | ||
| Output Noise | 2.5 | µVRMS | TA = +25°C, DR =15 SPS, PGA = 1, VIN+ = VIN- = GND | 5 | |||
| Integral Non-Linearity | INL | 10 | ppm of FSR | DR = 15 SPS (Note 5) | 5 | ||
| Internal Reference Voltage | VREF | 2.048 | V | 5 | |||
| Gain Error | 0.1 | % | PGA = 1, DR = 15 SPS | 5 | |||
| PGA Gain Error Match | 0.1 | % | Between any 2 PGA settings | 5 | |||
| Gain Error Drift | 15 | ppm/°C | PGA=1, DR=15 SPS | 5 | |||
| Offset Error | VOS | 30 | µV | PGA = 1, DR = 15 SPS | 6 | ||
| Offset Drift vs. Temperature | 50 | nV/°C | 6 | ||||
| Common-Mode Rejection (PGA=1) | 105 | dB | at DC and PGA =1 | 6 | |||
| Common-Mode Rejection (PGA=8) | 110 | dB | at DC and PGA =8, TA = +25°C | 6 | |||
| Gain vs. VDD | 5 | ppm/V | TA = +25°C, VDD = 2.7V to 5.5V, PGA = 1 | 6 | |||
| Power Supply Rejection at DC Input | 100 | dB | TA = +25°C, VDD = 2.7V to 5.5V, PGA = 1 | 6 | |||
| Supply voltage | VDD | 7 | V | 5 | |||
| All inputs and outputs voltage | -0.4 | 0.4 | V | VSS -0.4V to VDD+0.4V | 5 | ||
| Current at Input Pins | -2 | 2 | mA | 5 | |||
| Current at Output and Supply Pins | -10 | 10 | mA | 5 | |||
| Storage Temperature | -65 | 150 | °C | 5 | |||
| Ambient Temp. with power applied | -55 | 125 | °C | 5 | |||
| Maximum Junction Temperature | TJ | 150 | °C | 5 | |||
| ESD protection on all pins (HBM) | 6 | kV | HBM; ≥ 400V MM | 5 | |||
| Specified Temperature Range | TA | -40 | 85 | °C | 7 | ||
| Operating Temperature Range | TA | -40 | 125 | °C | 7 | ||
| Storage Temperature Range | TA | -65 | 150 | °C | 7 | ||
| Thermal Resistance, 10L-MSOP | θJA | 202 | °C/W | 7 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | MS = Plastic Micro Small Outline (MSOP), 8-lead SN = Plastic Small Outline SOIC, 8-lead | 53 |
CAD (KiCad official)
- Symbol:
MCP3427-E - Footprint:
Package_SO:MSOP-10_3x3mm_P0.5mm - 3D model: MSOP-10 (KiCad packages3D, STEP)
- 3D model files:
mcp3427-e-etched.step/mcp3427-e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp3427-e.step/mcp3427-e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (56 pp, sha256
3d9cc322b8fd7415, retrieved 2026-10-26, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).