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MCP33121D-05-E

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Microchip Tech Analog To Digital Converters (ADCs), MSOP-10. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MCP33121D-05-E

Microchip Tech · Analog To Digital Converters (ADCs) · MSOP-10

MCP33121D-05-E from Microchip Tech, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VREF power_in Single-ended external reference voltage input that must be 2.5V to 5.1V and sets the input full-scale range from -VREF to +VREF, decoupled with a 10 µF tantalum capacitor.
2 AVDD power_in Analog supply voltage input rated at 1.8V, decoupled with a 1 µF ceramic capacitor.
3 AIN+ input Differential positive analog input; each input must stay between GND - 0.1V and VREF + 0.1V.
4 AIN- input Differential negative analog input; each input must stay between GND - 0.1V and VREF + 0.1V.
5 GND power_in Power supply ground reference that is common to both the analog supply (AVDD) and the digital I/O supply (DVIO).
6 CNVST input Active-low conversion-start and SPI chip-select digital input, where a new conversion starts on its rising edge.
7 SDO output SPI-compatible serial data output that shifts conversion data out MSB first on SCLK.
8 SCLK input SPI-compatible serial data clock input that shifts out the ADC output, rated up to 100 MHz.
9 SDI input SPI-compatible serial data input that must be tied to DVIO for normal operation.
10 DVIO power_in Digital input/output interface supply voltage rated at 1.7V to 5.5V, decoupled with a 0.1 µF ceramic capacitor.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package MSOP-10
Category ADC/DAC/Data Conversion
Pins 10

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Analog Supply Voltage Range AVDD 1.7 1.8 1.9 V (Note 3) 3
Digital Input/Output Interface Voltage Range DVIO 1.7 5.5 V (Note 3) 3
Reference Voltage VREF 2.5 5.1 V -40°C ≤ TA ≤ 85°C 3
Reference Voltage VREF 2.7 5.1 V 85°C < TA ≤ 125°C 3
Analog Supply Current at AVDD pin: During Conversion IDDAN 1.4 2 mA fs = 500 kSPS (MCP331x1D-05) 3
Integral Nonlinearity INL -1.5 0.5 1.5 LSB MCP33121D-10 and MCP33121D-05 4
Differential Nonlinearity DNL -0.8 0.25 0.8 LSB MCP33121D-10 and MCP33121D-05 4
Offset Error -3 0.125 3 mV MCP33121D-10 and MCP33121D-05 4
Input leakage current (digital inputs) ILI -1 1 µA CNVST/SDI/SCLK = GND or DVIO 7
Output leakage current ILO -1 1 µA Output is high-Z, SDO = GND or DVIO 7
Serial Clock frequency fSCLK 100 MHz See tSCLK specification 8
SCLK Period tSCLK 10 ns DVIO ≥ 3.3V, fSCLK = 100 MHz (Max) 8
SCLK Period tSCLK 12 ns DVIO ≥ 2.3V, fSCLK = 83.3 MHz (Max) 8
SCLK Period tSCLK 16 ns DVIO ≥ 1.7V, fSCLK = 62.5 MHz (Max) 8
SCLK Low Time tSCLK_L 3 ns DVIO ≥ 2.3V 8
SCLK Low Time tSCLK_L 4.5 ns DVIO ≥ 1.7V 8
SCLK High Time tSCLK_H 3 ns DVIO ≥ 2.3V 8
SCLK High Time tSCLK_H 4.5 ns DVIO ≥ 1.7V 8
Output Valid from SCLK Low tDO 9.5 ns DVIO ≥ 3.3V 8
Output Valid from SCLK Low tDO 12 ns DVIO ≥ 2.3V 8
Output Valid from SCLK Low tDO 16 ns DVIO ≥ 1.7V 8
Quiet time tQUIET 10 ns (Note 2) 8
SDI Valid Setup time tSU_SDIH_CNV 5 ns SDI High to CNVST Rising Edge 8
CNVST Pulse Width High Time tCNVH 10 ns 8
Output Enable Time tEN 10 ns DVIO ≥ 2.3V 8
Output Enable Time tEN 15 ns DVIO ≥ 1.7V 8
Output Disable Time tDIS 15 ns (Note 2) 8
Self-Calibration Time tCAL 500 650 ms (Note 2) 7
Input Acquisition Time MCP331x1D-05 tACQ 700 800 ns -40°C ≤ TA ≤ 125°C 8
Data Conversion Time MCP331x1D-05 tCNV 1200 1300 ns -40°C ≤ TA ≤ 125°C 8
Time between Conversions MCP331x1D-05 tCYC 2 µs tCYC = tACQ + tCNV, fS = 500 kSPS 8
Sample Rate MCP331x1D-05 fs 500 kSPS Throughput rate 8
Operating Temperature Range TA -40 125 °C (Note 1) 8
Storage Temperature Range TA -65 150 °C (Note 1) 8
External Analog Supply Voltage (AVDD) absolute maximum AVDD -0.3 2 V 3
External Digital Supply Voltage (DVIO) absolute maximum DVIO -0.3 5.8 V 3
External Reference Voltage (VREF) absolute maximum VREF -0.3 5.8 V 3
Current at Input Pins -2 2 mA 3
Current at Output and Supply Pins -250 250 mA 3
Maximum Junction Temperature TJ 150 °C 3
Signal-to-Noise Ratio, 14-bit ADC SNR 81.7 85.1 dBFS VREF = 5V, fIN = 10 kHz 5
Signal-to-Noise and Distortion Ratio, 14-bit ADC SINAD 85 dBFS VREF = 5V, fIN = 10 kHz 5
Spurious Free Dynamic Range, 14-bit ADC SFDR 103.5 dBc VREF = 5V, fIN = 10 kHz 6
Total Harmonic Distortion, 14-bit ADC THD -99.2 dBc VREF = 5V, fIN = 10 kHz 6
Gain Error GER 0.5 LSB MCP33121D-10 and MCP33121D-05 4
Offset Error Drift with Temperature 0.8 V/oC 4
Gain Error Drift with temperature 0.35 V/oC 4
Input common-mode rejection ratio CMRR 84 dB 4
Power Supply Rejection Ratio PSRR 70 dB (Note 5) 4
Analog Supply Current at AVDD pin: During Standby IDDAN_STBY 0.8 µA During input acquisition (tACQ) 3
Input Leakage Current at Analog Input Pin ILEAK_AN_INPUT 2 200 nA During input acquisition (tACQ) 4
Input Sampling Capacitance CS 31 pF (Note 1) 4
-3dB Input Bandwidth BW-3dB 25 MHz (Note 1) 4
Aperture Delay 2.5 ns Time delay between CNVST rising edge and when input is sampled 4
Internal capacitance (all digital inputs and outputs) CINT 7 pF TA = 25°C (Note 1) 7
Thermal Resistance, MSOP-10 JA 202 °C/W 8

CAD (KiCad official)

  • Symbol: MCP33121D-05-E
  • Footprint: Package_SO:MSOP-10_3x3mm_P0.5mm
  • 3D model: MSOP-10 (KiCad packages3D, STEP)
  • 3D model files: mcp33121d-05-e-etched.step / mcp33121d-05-e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp33121d-05-e.step / mcp33121d-05-e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (59 pp, sha256 a78a66eb6299039c, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF