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MCP3221A5T-E
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Microchip Tech Analog To Digital Converters (ADCs), SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMCP3221A5T-E
Microchip Tech · Analog To Digital Converters (ADCs) · SOT-23-5
MCP3221A5T-E from Microchip Tech, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Supply pin, 2.7V to 5.5V, which also serves as the voltage reference for the conversion; bypass with 0.1 µF placed close to the pin (absolute maximum +7.0V). |
| 2 | VSS | power_in | Ground pin for the device. |
| 3 | AIN | input | Single-ended analog input to the sample-and-hold of the SAR converter, valid from VSS to VDD for proper conversions. |
| 4 | SDA | bidirectional | I2C serial data pin, open-drain, bidirectional for addresses and data; needs a pull-up to VDD (typically 10 kΩ at 100 kHz, 2 kΩ at 400 kHz). |
| 5 | SCL | input | I2C serial clock input that synchronizes data transfer on SDA; open-drain bus needing a pull-up to VDD (typically 10 kΩ at 100 kHz, 2 kΩ at 400 kHz). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOT-23-5 |
| Category | ADC/DAC/Data Conversion |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Integral Nonlinearity | INL | -2 | 0.75 | 2 | LSB | VDD = 5.0V, TA = -40°C to +85°C, fSCL = 400 kHz | 3 |
| Differential Nonlinearity | DNL | -1 | 0.5 | 1 | LSB | No missing codes | 3 |
| Offset Error | -2 | 2 | LSB | 3 | |||
| Gain Error | -1 | 3 | LSB | 3 | |||
| Input Voltage Range | -0.3 | 0.3 | V | 2.7V ≤ VDD ≤ 5.5V; VSS-0.3 to VDD+0.3 | 3 | ||
| Analog Input Leakage Current | -1 | 1 | µA | 3 | |||
| High-Level Input Voltage | VIH | 0.7 | V | 0.7 VDD (min) | 3 | ||
| Low-Level Input Voltage | VIL | 0.3 | V | 0.3 VDD (max) | 3 | ||
| Low-Level Output Voltage | VOL | 0.4 | V | IOL = 3 mA, RPU = 1.53 kΩ | 3 | ||
| Input Leakage Current | ILI | -1 | 1 | µA | VIN = 0.1 VDD and 0.9 VDD | 3 | |
| Output Leakage Current | ILO | -1 | 1 | µA | VOUT = 0.1 VSS and 0.9 VDD | 3 | |
| Pin Capacitance | CIN, COUT | 10 | pF | TA = 25°C, f = 1 MHz; (Note 2) | 4 | ||
| Bus Capacitance | CB | 400 | pF | SDA drive low, 0.4V | 4 | ||
| Operating Voltage | VDD | 2.7 | 5.5 | V | 4 | ||
| Conversion Current | IDD | 175 | 250 | µA | 4 | ||
| Standby Current | IDDS | 0.005 | 1 | µA | SDA, SCL = VDD | 4 | |
| Active Bus Current | IDDA | 120 | µA | Note 4 | 4 | ||
| Sample Rate | fSAMP | 22.3 | ksps | fSCL = 400 kHz (Note 1) | 4 | ||
| Operating Temperature Range | TA | -40 | 125 | °C | 4 | ||
| Storage Temperature Range | TA | -65 | 150 | °C | 4 | ||
| Supply Voltage | VDD | 7 | V | 3 | |||
| SDA and SCL pins w.r.t. VSS | -0.6 | 1 | V | -0.6V to VDD +1.0V (max printed as VDD+1.0V) | 3 | ||
| Storage Temperature | -65 | 150 | °C | 3 | |||
| Ambient Temperature with power applied | -65 | 125 | °C | 3 | |||
| Maximum Junction Temperature | 150 | °C | 3 | ||||
| ESD protection on all pins (HBM) | 4 | kV | ≥ 4 kV | 3 | |||
| Thermal Resistance, SOT-23 | θJA | 256 | °C/W | 4 | |||
| Clock Frequency (Standard Mode) | fSCL | 0 | 100 | kHz | I2C Standard Mode | 5 | |
| Clock High Time (Standard) | THIGH | 4000 | ns | I2C Standard Mode | 5 | ||
| Clock Low Time (Standard) | TLOW | 4700 | ns | I2C Standard Mode | 5 | ||
| SDA and SCL Rise Time (Standard) | TR | 1000 | ns | From VIL to VIH (Note 1) | 5 | ||
| SDA and SCL Fall Time (Standard) | TF | 300 | ns | From VIL to VIH (Note 1) | 5 | ||
| Start Condition Hold Time (Standard) | THD:STA | 4000 | ns | I2C Standard Mode | 5 | ||
| Start Condition Setup Time (Standard) | TSU:STA | 4700 | ns | I2C Standard Mode | 5 | ||
| Data Input Setup Time (Standard) | TSU:DAT | 250 | ns | I2C Standard Mode | 5 | ||
| Stop Condition Setup Time (Standard) | TSU:STO | 4000 | ns | I2C Standard Mode | 5 | ||
| Stop Condition Hold Time (Standard) | THD:STD | 4000 | ns | I2C Standard Mode | 5 | ||
| Output Valid from Clock (Standard) | TAA | 3500 | ns | I2C Standard Mode | 5 | ||
| Bus Free Time (Standard) | TBUF | 4700 | ns | Note 2 | 5 | ||
| Input Filter Spike Suppression (Standard) | TSP | 50 | ns | SDA and SCL pins (Note 1) | 5 | ||
| Clock Frequency (Fast Mode) | FSCL | 0 | 400 | kHz | I2C Fast Mode | 5 | |
| Clock High Time (Fast) | THIGH | 600 | ns | I2C Fast Mode | 5 | ||
| Clock Low Time (Fast) | TLOW | 1300 | ns | I2C Fast Mode | 5 | ||
| SDA and SCL Rise Time (Fast) | TR | 300 | ns | From VIL to VIH (Note 1); min printed 20 + 0.1CB | 5 | ||
| SDA and SCL Fall Time (Fast) | TF | 300 | ns | From VIL to VIH (Note 1); min printed 20 + 0.1CB | 5 | ||
| Start Condition Hold Time (Fast) | THD:STA | 600 | ns | I2C Fast Mode | 5 | ||
| Start Condition Setup Time (Fast) | TSU:STA | 600 | ns | I2C Fast Mode | 5 | ||
| Data Input Hold Time (Fast) | THD:DAT | 0 | 0.9 | ms | I2C Fast Mode | 5 | |
| Data Input Setup Time (Fast) | TSU:DAT | 100 | ns | I2C Fast Mode | 5 | ||
| Stop Condition Setup Time (Fast) | TSU:STO | 600 | ns | I2C Fast Mode | 5 | ||
| Stop Condition Hold Time (Fast) | THD:STD | 600 | ns | I2C Fast Mode | 5 | ||
| Output Valid from Clock (Fast) | TAA | 900 | ns | I2C Fast Mode | 5 | ||
| Bus Free Time (Fast) | TBUF | 1300 | ns | Note 2 | 5 | ||
| Input Filter Spike Suppression (Fast) | TSP | 50 | ns | SDA and SCL pins (Note 1) | 5 | ||
| Conversion Time | tCONV | 8.96 | µs | Note 5 | 4 | ||
| Analog Input Acquisition Time | tACQ | 1.12 | µs | Note 5 | 4 |
CAD (KiCad official)
- Symbol:
MCP3221A5T-E - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
mcp3221a5t-e-etched.step/mcp3221a5t-e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp3221a5t-e.step/mcp3221a5t-e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (30 pp, sha256
6e11b59a236328b7, retrieved 2026-10-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).