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MCP3208-BI
Public Made by Adomby adom
Microchip Tech Analog To Digital Converters (ADCs), SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMCP3208-BI
Microchip Tech · Analog To Digital Converters (ADCs) · SOIC-16
MCP3208-BI from Microchip Tech, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CH0 | input | Analog input channel 0, programmable as single-ended or as part of a pseudo-differential pair with CH1. |
| 2 | CH1 | input | Analog input channel 1, programmable as single-ended or as part of a pseudo-differential pair with CH0. |
| 3 | CH2 | input | Analog input channel 2, programmable as single-ended or as part of a pseudo-differential pair with CH3. |
| 4 | CH3 | input | Analog input channel 3, programmable as single-ended or as part of a pseudo-differential pair with CH2. |
| 5 | CH4 | input | Analog input channel 4, programmable as single-ended or as part of a pseudo-differential pair with CH5. |
| 6 | CH5 | input | Analog input channel 5, programmable as single-ended or as part of a pseudo-differential pair with CH4. |
| 7 | CH6 | input | Analog input channel 6, programmable as single-ended or as part of a pseudo-differential pair with CH7. |
| 8 | CH7 | input | Analog input channel 7, programmable as single-ended or as part of a pseudo-differential pair with CH6. |
| 9 | DGND | power_in | Digital ground connection to internal digital circuitry; connect to the analog ground plane when one is available. |
| 10 | CS/SHDN | input | Chip select/shutdown input; low initiates communication, high ends a conversion and puts the device in low-power standby, and it must be pulled high between conversions. |
| 11 | DIN | input | SPI serial data input used to load channel configuration data into the device. |
| 12 | DOUT | output | SPI serial data output that shifts out the A/D conversion result, changing on the falling edge of each clock. |
| 13 | CLK | input | SPI serial clock that initiates a conversion and clocks out each bit of the conversion result. |
| 14 | AGND | power_in | Analog ground connection to internal analog circuitry; connect to the analog ground plane when one is available. |
| 15 | VREF | power_in | Reference voltage input for the A/D converter. |
| 16 | VDD | power_in | +2.7V to 5.5V power supply input. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-16 |
| Category | ADC/DAC/Data Conversion |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Integral Nonlinearity (MCP3208-B) | INL | -1 | 0.75 | 1 | LSB | MCP3204/3208-B | 2 |
| Differential Nonlinearity | DNL | -1 | 0.5 | 1 | LSB | No missing codes over-temperature | 2 |
| Offset Error | -3 | 1.25 | 3 | LSB | 2 | ||
| Gain Error | -5 | 1.25 | 5 | LSB | 2 | ||
| Operating Voltage | VDD | 2.7 | 5.5 | V | 3 | ||
| Operating Current | IDD | 320 | 400 | µA | VDD=VREF = 5V, DOUT unloaded | 3 | |
| Operating Current | IDD | 225 | µA | VDD=VREF = 2.7V, DOUT unloaded | 3 | ||
| Standby Current | IDDS | 0.5 | 2 | µA | CS = VDD = 5.0V | 3 | |
| Reference Input Voltage Range | 0.25 | V | Note 2 (upper limit VDD) | 2 | |||
| Reference Current Drain | 100 | 150 | µA | 2 | |||
| Reference Current Drain (standby) | 0.001 | 3 | µA | CS = VDD = 5V | 2 | ||
| Throughput Rate | fSAMPLE | 100 | ksps | VDD = VREF = 5V | 2 | ||
| Throughput Rate | fSAMPLE | 50 | ksps | VDD = VREF = 2.7V | 2 | ||
| Input Voltage Range for IN- in pseudo-differential Mode | -100 | 100 | mV | VSS-100 to VSS+100 | 3 | ||
| Analog Input Leakage Current | -1 | 0.001 | 1 | µA | 3 | ||
| High Level Input Voltage | VIH | 0.7 | V | 0.7 VDD min | 3 | ||
| Low Level Input Voltage | VIL | 0.3 | V | 0.3 VDD max | 3 | ||
| High Level Output Voltage | VOH | 4.1 | V | IOH = -1 mA, VDD = 4.5V | 3 | ||
| Low Level Output Voltage | VOL | 0.4 | V | IOL = 1 mA, VDD = 4.5V | 3 | ||
| Input Leakage Current | ILI | -10 | 10 | µA | VIN = VSS or VDD | 3 | |
| Output Leakage Current | ILO | -10 | 10 | µA | VOUT = VSS or VDD | 3 | |
| Pin Capacitance (All Inputs/Outputs) | CIN,COUT | 10 | pF | VDD = 5.0V (Note 1), TA = 25°C, f = 1 MHz | 3 | ||
| Switch Resistance | 1000 | Ω | See Figure 4-1 | 3 | |||
| Sample Capacitor | 20 | pF | See Figure 4-1 | 3 | |||
| Clock Frequency | fCLK | 2 | MHz | VDD = 5V (Note 3) | 3 | ||
| Clock Frequency | fCLK | 1 | MHz | VDD = 2.7V (Note 3) | 3 | ||
| Clock High Time | tHI | 250 | ns | 3 | |||
| Clock Low Time | tLO | 250 | ns | 3 | |||
| CS Fall To First Rising CLK Edge | tSUCS | 100 | ns | 3 | |||
| Data Input Setup Time | tSU | 50 | ns | 3 | |||
| Data Input Hold Time | tHD | 50 | ns | 3 | |||
| CLK Fall To Output Data Valid | tDO | 200 | ns | See Figures 1-2 and 1-3 | 3 | ||
| CLK Fall To Output Enable | tEN | 200 | ns | See Figures 1-2 and 1-3 | 3 | ||
| CS Rise To Output Disable | tDIS | 100 | ns | See Figures 1-2 and 1-3 | 3 | ||
| CS Disable Time | tCSH | 500 | ns | 3 | |||
| DOUT Rise Time | tR | 100 | ns | See Figures 1-2 and 1-3 (Note 1) | 3 | ||
| DOUT Fall Time | tF | 100 | ns | See Figures 1-2 and 1-3 (Note 1) | 3 | ||
| Supply Voltage (absolute maximum) | VDD | 7 | V | 2 | |||
| Input/Output Voltage w.r.t. VSS (absolute maximum) | -0.6 | 6 | V | -0.6V to VDD +0.6V | 2 | ||
| Storage Temperature (absolute maximum) | -65 | 150 | °C | 2 | |||
| Ambient Temperature with Power Applied | -65 | 125 | °C | 2 | |||
| Soldering Temperature of Leads | 300 | °C | 10 seconds | 2 | |||
| ESD Protection on All Pins | 4 | kV | > 4 kV | 2 | |||
| Specified Temperature Range | TA | -40 | 125 | °C | VDD = 5V, VSS = 0V, VREF = 5V | 4 | |
| Operating Temperature Range | TA | -40 | 125 | °C | VDD = 5V, VSS = 0V, VREF = 5V | 4 | |
| Storage Temperature Range | TA | -65 | 150 | °C | VDD = 5V, VSS = 0V, VREF = 5V | 4 | |
| Thermal Resistance, 16L-SOIC | θJA | 86.1 | °C/W | 4 | |||
| Resolution | 12 | bits | 2 | ||||
| Conversion Time | tCONV | 12 | clock cycles | 2 | |||
| Total Harmonic Distortion | -82 | dB | VIN = 0.1V to 4.9V@1 kHz | 2 | |||
| Signal to Noise and Distortion | SINAD | 72 | dB | VIN = 0.1V to 4.9V@1 kHz | 2 | ||
| Spurious Free Dynamic Range | 86 | dB | VIN = 0.1V to 4.9V@1 kHz | 2 |
CAD (KiCad official)
- Symbol:
MCP3208-BI - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
mcp3208-bi-etched.step/mcp3208-bi-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp3208-bi.step/mcp3208-bi.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (40 pp, sha256
89bc1e17c35e2bb1, retrieved 2026-10-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).