component
MCP3204T-CI
Public Made by Adomby adom
Microchip Tech Analog To Digital Converters (ADCs), SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MCP3204T-CI
Microchip Tech · Analog To Digital Converters (ADCs) · SOIC-14
MCP3204T-CI from Microchip Tech, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CH0 | input | Analog input channel 0, programmable as a single-ended input or as one side of a pseudo-differential pair. |
| 2 | CH1 | input | Analog input channel 1, programmable as a single-ended input or as one side of a pseudo-differential pair. |
| 3 | CH2 | input | Analog input channel 2, programmable as a single-ended input or as one side of a pseudo-differential pair. |
| 4 | CH3 | input | Analog input channel 3, programmable as a single-ended input or as one side of a pseudo-differential pair. |
| 5 | NC | unconnected | No connection. |
| 6 | NC | unconnected | No connection. |
| 7 | DGND | power_in | Digital ground connection to internal digital circuitry. |
| 8 | CS/SHDN | input | Chip select/shutdown: pulled low to initiate communication and pulled high to end a conversion and enter low-power standby, and must be pulled high between conversions. |
| 9 | DIN | input | Serial data input used to load channel configuration data into the device. |
| 10 | DOUT | output | Serial data output that shifts out the A/D conversion results, changing on the falling edge of each clock. |
| 11 | CLK | input | SPI serial clock that initiates a conversion and clocks out each bit of the conversion. |
| 12 | AGND | power_in | Analog ground connection to internal analog circuitry. |
| 13 | VREF | power_in | Reference voltage input for the A/D converter. |
| 14 | VDD | power_in | Power supply, +2.7V to 5.5V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-14 |
| Category | ADC/DAC/Data Conversion |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Voltage | VDD | 2.7 | 5.5 | V | 3 | ||
| Operating Current | IDD | 320 | 400 | µA | VDD=VREF = 5V, DOUT unloaded | 3 | |
| Operating Current | IDD | 225 | µA | VDD=VREF = 2.7V, DOUT unloaded | 3 | ||
| Standby Current | IDDS | 0.5 | 2 | µA | CS = VDD = 5.0V | 3 | |
| Integral Nonlinearity (MCP3204/3208-C) | INL | -2 | 2 | LSB | MCP3204/3208-C | 2 | |
| Reference Voltage Range | 0.25 | V | Note 2; maximum printed as VDD | 2 | |||
| Reference Current Drain | 100 | 150 | µA | CS = VDD = 5V | 2 | ||
| Reference Current Drain | 0.001 | 3 | µA | 2 | |||
| Leakage Current | -1 | 0.001 | 1 | µA | 3 | ||
| High Level Output Voltage | VOH | 4.1 | V | IOH = -1 mA, VDD = 4.5V | 3 | ||
| Low Level Output Voltage | VOL | 0.4 | V | IOL = 1 mA, VDD = 4.5V | 3 | ||
| Input Leakage Current | ILI | -10 | 10 | µA | VIN = VSS or VDD | 3 | |
| Output Leakage Current | ILO | -10 | 10 | µA | VOUT = VSS or VDD | 3 | |
| Pin Capacitance (All Inputs/Outputs) | CIN,COUT | 10 | pF | VDD = 5.0V (Note 1), TA = 25°C, f = 1 MHz | 3 | ||
| Throughput Rate | fSAMPLE | 100 | ksps | VDD = VREF = 5V | 2 | ||
| Throughput Rate | fSAMPLE | 50 | ksps | VDD = VREF = 2.7V | 2 | ||
| Conversion Time | tCONV | 12 | clock cycles | 2 | |||
| Clock Frequency | fCLK | 2 | MHz | VDD = 5V (Note 3) | 3 | ||
| Clock Frequency | fCLK | 1 | MHz | VDD = 2.7V (Note 3) | 3 | ||
| Clock High Time | tHI | 250 | ns | 3 | |||
| Clock Low Time | tLO | 250 | ns | 3 | |||
| CS Fall To First Rising CLK Edge | tSUCS | 100 | ns | 3 | |||
| Data Input Setup Time | tSU | 50 | ns | 3 | |||
| Data Input Hold Time | tHD | 50 | ns | 3 | |||
| CLK Fall To Output Data Valid | tDO | 200 | ns | See Figures 1-2 and 1-3 | 3 | ||
| CLK Fall To Output Enable | tEN | 200 | ns | See Figures 1-2 and 1-3 | 3 | ||
| CS Rise To Output Disable | tDIS | 100 | ns | See Figures 1-2 and 1-3 | 3 | ||
| CS Disable Time | tCSH | 500 | ns | 3 | |||
| DOUT Rise Time | tR | 100 | ns | See Figures 1-2 and 1-3 (Note 1) | 3 | ||
| DOUT Fall Time | tF | 100 | ns | See Figures 1-2 and 1-3 (Note 1) | 3 | ||
| Specified Temperature Range | TA | -40 | 125 | °C | 4 | ||
| Operating Temperature Range | TA | -40 | 125 | °C | 4 | ||
| Storage Temperature Range | TA | -65 | 150 | °C | 4 | ||
| Supply Voltage (VDD) | VDD | 7 | V | 2 | |||
| All inputs and outputs w.r.t. VSS | -0.6 | V | Upper limit printed as VDD +0.6V | 2 | |||
| Storage temperature | -65 | 150 | °C | 2 | |||
| Ambient temp. with power applied | -65 | 125 | °C | 2 | |||
| Soldering temperature of leads (10 seconds) | 300 | °C | 10 seconds | 2 | |||
| ESD protection on all pins | 4 | kV | > 4 kV | 2 | |||
| Thermal Resistance, 14L-SOIC | θJA | 95.3 | °C/W | 4 | |||
| Total Harmonic Distortion | THD | -82 | dB | VIN = 0.1V to 4.9V@1 kHz | 2 | ||
| Signal to Noise and Distortion (SINAD) | SINAD | 72 | dB | VIN = 0.1V to 4.9V@1 kHz | 2 | ||
| Spurious Free Dynamic Range | SFDR | 86 | dB | VIN = 0.1V to 4.9V@1 kHz | 2 | ||
| Differential Nonlinearity | DNL | 0.5 | 1 | LSB | No missing codes over-temperature | 2 | |
| Offset Error | 1.25 | 3 | LSB | 2 | |||
| Gain Error | 1.25 | 5 | LSB | 2 | |||
| Switch Resistance | 1000 | Ω | See Figure 4-1 | 3 | |||
| Sample Capacitor | 20 | pF | See Figure 4-1 | 3 |
CAD (KiCad official)
- Symbol:
MCP3204T-CI - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
mcp3204t-ci-etched.step/mcp3204t-ci-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp3204t-ci.step/mcp3204t-ci.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (40 pp, sha256
89bc1e17c35e2bb1, retrieved 2026-10-27, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MCP3204T-CI
**Microchip Tech** · Analog To Digital Converters (ADCs) · SOIC-14
MCP3204T-CI from Microchip Tech, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CH0 | input | Analog input channel 0, programmable as a single-ended input or as one side of a pseudo-differential pair. |
| 2 | CH1 | input | Analog input channel 1, programmable as a single-ended input or as one side of a pseudo-differential pair. |
| 3 | CH2 | input | Analog input channel 2, programmable as a single-ended input or as one side of a pseudo-differential pair. |
| 4 | CH3 | input | Analog input channel 3, programmable as a single-ended input or as one side of a pseudo-differential pair. |
| 5 | NC | unconnected | No connection. |
| 6 | NC | unconnected | No connection. |
| 7 | DGND | power_in | Digital ground connection to internal digital circuitry. |
| 8 | CS/SHDN | input | Chip select/shutdown: pulled low to initiate communication and pulled high to end a conversion and enter low-power standby, and must be pulled high between conversions. |
| 9 | DIN | input | Serial data input used to load channel configuration data into the device. |
| 10 | DOUT | output | Serial data output that shifts out the A/D conversion results, changing on the falling edge of each clock. |
| 11 | CLK | input | SPI serial clock that initiates a conversion and clocks out each bit of the conversion. |
| 12 | AGND | power_in | Analog ground connection to internal analog circuitry. |
| 13 | VREF | power_in | Reference voltage input for the A/D converter. |
| 14 | VDD | power_in | Power supply, +2.7V to 5.5V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-14 |
| Category | ADC/DAC/Data Conversion |
| Pins | 14 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Voltage | VDD | 2.7 | | 5.5 | V | | 3 |
| Operating Current | IDD | | 320 | 400 | µA | VDD=VREF = 5V, DOUT unloaded | 3 |
| Operating Current | IDD | | 225 | | µA | VDD=VREF = 2.7V, DOUT unloaded | 3 |
| Standby Current | IDDS | | 0.5 | 2 | µA | CS = VDD = 5.0V | 3 |
| Integral Nonlinearity (MCP3204/3208-C) | INL | -2 | | 2 | LSB | MCP3204/3208-C | 2 |
| Reference Voltage Range | | 0.25 | | | V | Note 2; maximum printed as VDD | 2 |
| Reference Current Drain | | | 100 | 150 | µA | CS = VDD = 5V | 2 |
| Reference Current Drain | | | 0.001 | 3 | µA | | 2 |
| Leakage Current | | -1 | 0.001 | 1 | µA | | 3 |
| High Level Output Voltage | VOH | 4.1 | | | V | IOH = -1 mA, VDD = 4.5V | 3 |
| Low Level Output Voltage | VOL | | | 0.4 | V | IOL = 1 mA, VDD = 4.5V | 3 |
| Input Leakage Current | ILI | -10 | | 10 | µA | VIN = VSS or VDD | 3 |
| Output Leakage Current | ILO | -10 | | 10 | µA | VOUT = VSS or VDD | 3 |
| Pin Capacitance (All Inputs/Outputs) | CIN,COUT | | | 10 | pF | VDD = 5.0V (Note 1), TA = 25°C, f = 1 MHz | 3 |
| Throughput Rate | fSAMPLE | | | 100 | ksps | VDD = VREF = 5V | 2 |
| Throughput Rate | fSAMPLE | | | 50 | ksps | VDD = VREF = 2.7V | 2 |
| Conversion Time | tCONV | | | 12 | clock cycles | | 2 |
| Clock Frequency | fCLK | | | 2 | MHz | VDD = 5V (Note 3) | 3 |
| Clock Frequency | fCLK | | | 1 | MHz | VDD = 2.7V (Note 3) | 3 |
| Clock High Time | tHI | 250 | | | ns | | 3 |
| Clock Low Time | tLO | 250 | | | ns | | 3 |
| CS Fall To First Rising CLK Edge | tSUCS | 100 | | | ns | | 3 |
| Data Input Setup Time | tSU | 50 | | | ns | | 3 |
| Data Input Hold Time | tHD | 50 | | | ns | | 3 |
| CLK Fall To Output Data Valid | tDO | | | 200 | ns | See Figures 1-2 and 1-3 | 3 |
| CLK Fall To Output Enable | tEN | | | 200 | ns | See Figures 1-2 and 1-3 | 3 |
| CS Rise To Output Disable | tDIS | | | 100 | ns | See Figures 1-2 and 1-3 | 3 |
| CS Disable Time | tCSH | 500 | | | ns | | 3 |
| DOUT Rise Time | tR | | | 100 | ns | See Figures 1-2 and 1-3 (Note 1) | 3 |
| DOUT Fall Time | tF | | | 100 | ns | See Figures 1-2 and 1-3 (Note 1) | 3 |
| Specified Temperature Range | TA | -40 | | 125 | °C | | 4 |
| Operating Temperature Range | TA | -40 | | 125 | °C | | 4 |
| Storage Temperature Range | TA | -65 | | 150 | °C | | 4 |
| Supply Voltage (VDD) | VDD | | | 7 | V | | 2 |
| All inputs and outputs w.r.t. VSS | | -0.6 | | | V | Upper limit printed as VDD +0.6V | 2 |
| Storage temperature | | -65 | | 150 | °C | | 2 |
| Ambient temp. with power applied | | -65 | | 125 | °C | | 2 |
| Soldering temperature of leads (10 seconds) | | | | 300 | °C | 10 seconds | 2 |
| ESD protection on all pins | | 4 | | | kV | > 4 kV | 2 |
| Thermal Resistance, 14L-SOIC | θJA | | 95.3 | | °C/W | | 4 |
| Total Harmonic Distortion | THD | | -82 | | dB | VIN = 0.1V to 4.9V@1 kHz | 2 |
| Signal to Noise and Distortion (SINAD) | SINAD | | 72 | | dB | VIN = 0.1V to 4.9V@1 kHz | 2 |
| Spurious Free Dynamic Range | SFDR | | 86 | | dB | VIN = 0.1V to 4.9V@1 kHz | 2 |
| Differential Nonlinearity | DNL | | 0.5 | 1 | LSB | No missing codes over-temperature | 2 |
| Offset Error | | | 1.25 | 3 | LSB | | 2 |
| Gain Error | | | 1.25 | 5 | LSB | | 2 |
| Switch Resistance | | | 1000 | | Ω | See Figure 4-1 | 3 |
| Sample Capacitor | | | 20 | | pF | See Figure 4-1 | 3 |
## CAD (KiCad official)
- Symbol: `MCP3204T-CI`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files: `mcp3204t-ci-etched.step` / `mcp3204t-ci-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mcp3204t-ci.step` / `mcp3204t-ci.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](https://ww1.microchip.com/downloads/en/DeviceDoc/21298e.pdf) (40 pp, sha256 `89bc1e17c35e2bb1`, retrieved 2026-10-27, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mcp3204t-ci-datasheet.pdf)