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MCP3202-BI

Microchip Tech · Analog To Digital Converters (ADCs) · SOIC-8

MCP3202-BI from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	CS/SHDN	input	Chip select/shutdown input; pulled low to initiate communication, pulled high to end a conversion and enter low-power standby, and must be high between conversions.
2	CH0	input	Channel 0 analog input, programmable as single-ended input or as IN+/IN- of the pseudo-differential pair.
3	CH1	input	Channel 1 analog input, programmable as single-ended input or as IN+/IN- of the pseudo-differential pair.
4	VSS	power_in	Ground.
5	DIN	input	SPI serial data input used to clock in the input channel configuration data.
6	DOUT	output	SPI serial data output that shifts out the A/D conversion result, with data changing on the falling edge of each clock.
7	CLK	input	SPI serial clock that initiates a conversion and clocks out each bit of the conversion result.
8	VDD/VREF	power_in	+2.7V to 5.5V power supply and reference voltage input.

Key specifications

Parameter	Value
Manufacturer	Microchip Tech
Package	SOIC-8
Category	Analog ICs
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Integral Nonlinearity (MCP3202-B)	INL	-1	0.75	1	LSB	MCP3202-B	2
Differential Nonlinearity	DNL	-1	0.5	1	LSB	No missing codes over temperature	2
Offset Error		-3	1.25	3	LSB		2
Gain Error		-5	1.25	5	LSB		2
Throughput Rate at 5V	fSAMPL			100	ksps	VDD = VREF = 5V	2
Throughput Rate at 2.7V	fSAMPL			50	ksps	VDD = VREF = 2.7V	2
Conversion Time	tCONV			12	clock cycles		2
Input Voltage Range for IN- (pseudo-differential)	IN-	-100		100	mV	VSS-100 to VSS+100; See Sections 3.1 and 4.1	2
Analog Input Leakage Current		-1	0.001	1	A	Unit printed as 'A' in text	2
High Level Input Voltage	VIH	0.7			V	0.7 VDD (min, times VDD)	2
Low Level Input Voltage	VIL			0.3	V	0.3 VDD (max, times VDD)	2
High Level Output Voltage	VOH	4.1			V	IOH = -1 mA, VDD = 4.5V	3
Low Level Output Voltage	VOL			0.4	V	IOL = 1 mA, VDD = 4.5V	3
Input Leakage Current	ILI	-10		10	µA	VIN = VSS or VDD	3
Output Leakage Current	ILO	-10		10	µA	VOUT = VSS or VDD	3
Pin Capacitance (All Inputs/Outputs)	CIN, COUT			10	pF	VDD = 5.0V (Note 1), TA = +25°C, f = 1 MHz	3
Clock Frequency at 5V	fCLK			1.8	MHz	VDD = 5V (Note 2)	3
Clock Frequency at 2.7V	fCLK			0.9	MHz	VDD = 2.7V (Note 2)	3
CS Fall To First Rising CLK Edge	tSUCS	100			ns		3
Data Input Setup Time	tSU	50			ns		3
Data Input Hold Time	tHD	50			ns		3
CLK Fall To Output Data Valid	tDO			200	ns	See Test Circuits, Figure 1-2	3
CLK Fall To Output Enable	tEN			200	ns	See Test Circuits, Figure 1-2	3
CS Rise To Output Disable	tDIS			100	ns	See Test Circuits, Figure 1-2, Note 1	3
CS Disable Time	tCSH	500			ns		3
DOUT Rise Time	tR			100	ns	See Test Circuits, Figure 1-2, Note 1	3
DOUT Fall Time	tF			100	ns	See Test Circuits, Figure 1-2, Note 1	3
Operating Voltage	VDD	2.7		5.5	V		3
Operating Current	IDD		375	550	µA	VDD = 5.0V, DOUT unloaded	3
Standby Current	IDDS		0.5	5	µA	CS = VDD = 5.0V	3
Specified Temperature Range	TA	-40		85	°C		3
Operating Temperature Range	TA	-40		85	°C		3
Storage Temperature Range	TA	-65		150	°C		3
All Inputs and Outputs w.r.t. VSS		-0.6			V	-0.6V to VDD + 0.6V	2
Storage Temperature		-65		150	°C		2
Ambient temperature with power applied		-65		150	°C		2
Maximum Junction Temperature	TJ			150	°C		2
ESD Protection On All Pins (HBM)				4	kV	HBM	2
Thermal Resistance, 8L-SOIC	θJA		149.5		°C/W		3
Total Harmonic Distortion	THD		-82		dB	VIN = 0.1V to 4.9V@1 kHz	2
Signal-to-Noise and Distortion	SINAD		72		dB	VIN = 0.1V to 4.9V@1 kHz	2
Spurious Free Dynamic Range	SFDR		86		dB	VIN = 0.1V to 4.9V@1 kHz	2
Sample Capacitor	CSAMPLE		20		pF	See Figure 4-1	2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part	Material	Colour / plating	Datasheet says	Page
contacts		tin	P = Plastic DIP (300 mil Body), 8-Lead SN = Plastic SOIC (150 mil Body), 8-Lead	31

CAD (KiCad official)

Symbol: MCP3202-BI
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)
3D model files: mcp3202-bi-etched.step / mcp3202-bi-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp3202-bi.step / mcp3202-bi.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Microchip Tech datasheet (34 pp, sha256 a17c72dd02283c5f, retrieved 2026-10-23, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF