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MCP3008T-I

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Microchip Tech Analog To Digital Converters (ADC), SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MCP3008T-I

Microchip Tech · Analog To Digital Converters (ADC) · SOIC-16

MCP3008T-I from Microchip Tech, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CH0 input Analog input channel 0, usable as a single-ended input or as the IN+ of a pseudo-differential pair with CH1.
2 CH1 input Analog input channel 1, usable as a single-ended input or as the IN- of a pseudo-differential pair with CH0.
3 CH2 input Analog input channel 2, usable as a single-ended input or as the IN+ of a pseudo-differential pair with CH3.
4 CH3 input Analog input channel 3, usable as a single-ended input or as the IN- of a pseudo-differential pair with CH2.
5 CH4 input Analog input channel 4 (MCP3008 only), usable as a single-ended input or as the IN+ of a pseudo-differential pair with CH5.
6 CH5 input Analog input channel 5 (MCP3008 only), usable as a single-ended input or as the IN- of a pseudo-differential pair with CH4.
7 CH6 input Analog input channel 6 (MCP3008 only), usable as a single-ended input or as the IN+ of a pseudo-differential pair with CH7.
8 CH7 input Analog input channel 7 (MCP3008 only), usable as a single-ended input or as the IN- of a pseudo-differential pair with CH6.
9 DGND power_in Digital ground connection to the internal digital circuitry.
10 CS/SHDN input Chip select/shutdown: pulling low starts communication, pulling high ends a conversion and enters low-power standby, and it must be high between conversions.
11 DIN input SPI serial data input used to load channel configuration data into the device.
12 DOUT output SPI serial data output that shifts out the A/D conversion result; data changes on the falling edge of each clock.
13 CLK input SPI serial clock that initiates a conversion and clocks out each bit of the result; clock speed constraints are given in Section 6.2.
14 AGND power_in Analog ground connection to the internal analog circuitry.
15 VREF power_in Reference voltage input for the A/D converter.
16 VDD power_in Positive power supply, +2.7V to 5.5V.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-16
Category Data Acquisition
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
All inputs and outputs w.r.t. VSS -0.6 V 3
Storage temperature -65 150 °C 3
Ambient temperature with power applied -65 150 °C 3
Soldering temperature of leads 300 °C 10 seconds 3
ESD protection on all pins (HBM) 4 kV 3
Operating voltage VDD 2.7 5.5 V 5
Specified temperature range TA -40 85 °C 5
Operating temperature range TA -40 85 °C 5
Storage temperature range TA -65 150 °C 5
Thermal resistance, 16L-SOIC θJA 90 °C/W 5
Integral nonlinearity INL -1 0.5 1 LSB 3
Differential nonlinearity DNL -1 0.25 1 LSB No missing codes over temperature 3
Offset error -1.5 1.5 LSB 3
Gain error -1 1 LSB 3
Conversion time tCONV 10 clock cycles 3
Throughput rate fSAMPLE 200 ksps VDD = VREF = 5V 3
Throughput rate fSAMPLE 75 ksps VDD = VREF = 2.7V 3
Reference voltage range VREF 0.25 V Note 2 3
Reference current drain 100 150 µA CS = VDD = 5V 3
Reference current drain (second printed value) 0.001 3 µA CS = VDD = 5V 3
Pseudo-differential IN- input voltage range (relative to VSS) VIN- -100 100 mV 3
Leakage current (analog input) -1 0.001 1 µA 4
High level output voltage VOH 4.1 V IOH = -1 mA, VDD = 4.5V 4
Low level output voltage VOL 0.4 V IOL = 1 mA, VDD = 4.5V 4
Input leakage current ILI -10 10 µA VIN = VSS or VDD 4
Output leakage current ILO -10 10 µA VOUT = VSS or VDD 4
Pin capacitance (all inputs/outputs) CIN, COUT 10 pF VDD = 5.0V (Note 1); TA = 25°C, f = 1 MHz 4
Clock frequency fCLK 3.6 MHz VDD = 5V (Note 3) 4
Clock frequency fCLK 1.35 MHz VDD = 2.7V (Note 3) 4
Clock high time tHI 125 ns 4
Clock low time tLO 125 ns 4
CS fall to first rising CLK edge tSUCS 100 ns 4
CS fall to falling CLK edge tCSD 0 ns 4
Data input setup time tSU 50 ns 4
Data input hold time tHD 50 ns 4
CLK fall to output data valid tDO 125 ns VDD = 5V, See Figure 1-2 4
CLK fall to output data valid tDO 200 ns VDD = 2.7V, See Figure 1-2 4
CLK fall to output enable tEN 125 ns VDD = 5V, See Figure 1-2 4
CLK fall to output enable tEN 200 ns VDD = 2.7V, See Figure 1-2 4
CS rise to output disable tDIS 100 ns See Test Circuits, Figure 1-2 4
CS disable time tCSH 270 ns 4
DOUT rise time tR 100 ns See Test Circuits, Figure 1-2 4
DOUT fall time tF 100 ns See Test Circuits, Figure 1-2 4
Operating current IDD 550 µA VDD = VREF = 5V, DOUT unloaded 5
Standby current IDDS 0.005 2 µA CS = VDD = 5.0V 5

CAD (KiCad official)

  • Symbol: MCP3008T-I
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: mcp3008t-i-etched.step / mcp3008t-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp3008t-i.step / mcp3008t-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (40 pp, sha256 e6c2231de727395f, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF