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MCP3004T-I

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Microchip Tech Analog To Digital Converters (ADCs), TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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MCP3004T-I

Microchip Tech · Analog To Digital Converters (ADCs) · TSSOP-14

MCP3004T-I from Microchip Tech, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CH0 input Analog input channel 0, usable as single-ended input or as one side of a pseudo-differential pair.
2 CH1 input Analog input channel 1, usable as single-ended input or as one side of a pseudo-differential pair.
3 CH2 input Analog input channel 2, usable as single-ended input or as one side of a pseudo-differential pair.
4 CH3 input Analog input channel 3, usable as single-ended input or as one side of a pseudo-differential pair.
5 NC unconnected No internal connection on the MCP3004; leave unconnected.
6 NC unconnected No internal connection on the MCP3004; leave unconnected.
7 DGND power_in Digital ground connection to the internal digital circuitry.
8 CS/SHDN input Chip select/shutdown: pulled low to start communication, and must be pulled high between conversions to enter low-power standby.
9 DIN input SPI serial data input used to load channel configuration data into the device.
10 DOUT output SPI serial data output used to shift out the A/D conversion results; data changes on the falling clock edge.
11 CLK input SPI serial clock that initiates a conversion and clocks out each bit of the conversion.
12 AGND power_in Analog ground connection to the internal analog circuitry.
13 VREF power_in Reference voltage input for the A/D converter.
14 VDD power_in Power supply input, +2.7V to 5.5V.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TSSOP-14
Category ADC/DAC/Data Conversion
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Throughput Rate fSAMPLE 200 ksps VDD = VREF = 5V 3
Throughput Rate fSAMPLE 75 ksps VDD = VREF = 2.7V 3
Integral Nonlinearity INL -1 0.5 1 LSB 3
Differential Nonlinearity DNL -1 0.25 1 LSB No missing codes over temperature 3
Offset Error -1.5 1.5 LSB 3
Gain Error -1 1 LSB 3
Reference Input Voltage Range VREF 0.25 V Note 2 3
Current Drain IREF 100 150 µA CS = VDD = 5V 3
Current Drain IREF 0.001 3 µA CS = VDD = 5V 3
Input Voltage Range for IN- in pseudo-differential mode IN- -100 100 mV Relative to VSS 3
Leakage Current -1 0.001 1 µA 4
High Level Input Voltage VIH 0.7 VDD 4
Low Level Input Voltage VIL 0.3 VDD 4
High Level Output Voltage VOH 4.1 V IOH = -1 mA, VDD = 4.5V 4
Low Level Output Voltage VOL 0.4 V IOL = 1 mA, VDD = 4.5V 4
Input Leakage Current ILI -10 10 µA VIN = VSS or VDD 4
Output Leakage Current ILO -10 10 µA VOUT = VSS or VDD 4
Pin Capacitance (All Inputs/Outputs) CIN, COUT 10 pF VDD = 5.0V (Note 1); TA = 25°C, f = 1 MHz 4
Clock Frequency fCLK 3.6 MHz VDD = 5V (Note 3) 4
Clock Frequency fCLK 1.35 MHz VDD = 2.7V (Note 3) 4
Clock High Time tHI 125 ns 4
Clock Low Time tLO 125 ns 4
CS Fall To First Rising CLK Edge tSUCS 100 ns 4
CS Fall To Falling CLK Edge tCSD 0 ns 4
Data Input Setup Time tSU 50 ns 4
Data Input Hold Time tHD 50 ns 4
CLK Fall To Output Data Valid tDO 125 ns VDD = 5V, See Figure 1-2 4
CLK Fall To Output Data Valid tDO 200 ns VDD = 2.7V, See Figure 1-2 4
CLK Fall To Output Enable tEN 125 ns VDD = 5V, See Figure 1-2 4
CLK Fall To Output Enable tEN 200 ns VDD = 2.7V, See Figure 1-2 4
CS Rise To Output Disable tDIS 100 ns See Test Circuits, Figure 1-2 4
CS Disable Time tCSH 270 ns 4
DOUT Rise Time tR 100 ns See Test Circuits, Figure 1-2 4
DOUT Fall Time tF 100 ns See Test Circuits, Figure 1-2 4
Operating Voltage VDD 2.7 5.5 V 5
Operating Current IDD 425 550 µA VDD = VREF = 5V, DOUT unloaded 5
Standby Current IDDS 0.005 2 µA CS = VDD = 5.0V 5
Specified Temperature Range TA -40 85 °C 5
Operating Temperature Range TA -40 85 °C 5
Storage Temperature Range TA -65 150 °C 5
All Inputs and Outputs w.r.t. VSS -0.6 V Max is VDD + 0.6V w.r.t. VSS 3
Storage Temperature TSTG -65 150 °C 3
Ambient temperature with power applied -65 150 °C 3
Soldering temperature of leads (10 seconds) 300 °C 10 seconds 3
ESD Protection On All Pins (HBM) 4 kV 3
Thermal Resistance, 14L-TSSOP θJA 100 °C/W 5

CAD (KiCad official)

  • Symbol: MCP3004T-I
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: mcp3004t-i-etched.step / mcp3004t-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp3004t-i.step / mcp3004t-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (40 pp, sha256 e6c2231de727395f, retrieved 2026-10-26, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF