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MCP3002-I

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Microchip Tech Digital To Analog Converters (DACs), SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

markdown

MCP3002-I

Microchip Tech · Digital To Analog Converters (DACs) · SOIC-8

MCP3002-I from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS/SHDN input Chip select/shutdown input: pulling low initiates communication, pulling high ends a conversion and puts the device in low-power standby, and it must be pulled high between conversions.
2 CH0 input Channel 0 analog input, usable as a single-ended input or as IN+/IN- of a pseudo-differential pair as set by the serial command.
3 CH1 input Channel 1 analog input, usable as a single-ended input or as IN+/IN- of a pseudo-differential pair as set by the serial command.
4 VSS power_in Ground.
5 DIN input SPI serial data input used to clock in the input channel configuration data.
6 DOUT output SPI serial data output that shifts out the A/D conversion result, with data changing on the falling edge of each clock.
7 CLK input SPI serial clock input used to initiate a conversion and to clock out each bit of the conversion result.
8 VDD/VREF power_in +2.7V to 5.5V power supply and reference voltage input.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8
Category Data Converters
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Integral Nonlinearity INL 0.5 1 LSB 2
Differential Nonlinearity DNL 0.25 1 LSB No missing codes over temperature 2
Offset Error 1.5 LSB 2
Gain Error 1 LSB 2
Throughput Rate FSAMPLE 200 ksps VDD = 5V 2
Throughput Rate FSAMPLE 75 ksps VDD = 2.7V 2
Conversion Time TCONV 10 clock cycles 2
IN- Input Voltage Range IN- -100 100 mV VSS-100 to VSS+100, pseudo-differential mode 2
Leakage Current (analog input) -1 0.001 1 µA 2
High Level Input Voltage VIH 0.7 V 0.7 VDD 3
Low Level Input Voltage VIL 0.3 V 0.3 VDD 3
High Level Output Voltage VOH 4.1 V IOH = -1 mA, VDD = 4.5V 3
Low Level Output Voltage VOL 0.4 V IOL = 1 mA, VDD = 4.5V 3
Input Leakage Current ILI -10 10 µA VIN = VSS or VDD 3
Output Leakage Current ILO -10 10 µA VOUT = VSS or VDD 3
Pin Capacitance CIN, COUT 10 pF VDD = 5.0V (Note 1), TA = 25°C, f = 1 MHz 3
Clock Frequency fCLK 3.2 MHz VDD = 5V (Note 2) 3
Clock Frequency fCLK 1.2 MHz VDD = 2.7V (Note 2) 3
Clock High Time tHI 140 ns 3
Clock Low Time tLO 140 ns 3
CS Fall To First Rising CLK Edge tSUCS 100 ns 3
Data Input Setup Time tSU 50 ns 3
Data Input Hold Time tHD 50 ns 3
CLK Fall To Output Data Valid tDO 125 ns VDD = 5V, see Figure 1-2 3
CLK Fall To Output Data Valid tDO 200 ns VDD = 2.7V, see Figure 1-2 3
CLK Fall To Output Enable tEN 125 ns VDD = 5V, see Figure 1-2 3
CLK Fall To Output Enable tEN 200 ns VDD = 2.7V, see Figure 1-2 3
CS Rise To Output Disable tDIS 100 ns See Test Circuits, Figure 1-2 Note 1 3
CS Disable Time tCSH 310 ns 3
DOUT Rise Time tR 100 ns See Test Circuits, Figure 1-2 Note 1 3
DOUT Fall Time tF 100 ns See Test Circuits, Figure 1-2 Note 1 3
Operating Voltage VDD 2.7 5.5 V 3
Operating Current IDD 525 650 µA VDD = 5.0V, DOUT unloaded 3
Operating Current IDD 300 µA VDD = 2.7V, DOUT unloaded 3
Standby Current IDDS 0.005 2 µA CS = VDD = 5.0V 3
All Inputs and Outputs w.r.t. VSS -0.6 0.6 V -0.6V to VDD + 0.6V (max is VDD + 0.6V) 2
Storage Temperature -65 150 °C 2
Ambient temperature with power applied -65 150 °C 2
ESD Protection On All Pins (HBM) 4 kV 2
Specified Temperature Range TA -40 85 °C 4
Operating Temperature Range TA -40 85 °C 4
Storage Temperature Range TA -65 150 °C 4
Thermal Resistance, 8L-SOIC θJA 149.5 °C/W 4
Sample Capacitor CSAMPLE 20 pF See Figure 4-1 2
Total Harmonic Distortion THD -76 dB VIN = 0.1V to 4.9V@1 kHz 2
Signal to Noise and Distortion SINAD 61 dB VIN = 0.1V to 4.9V@1 kHz 2
Spurious Free Dynamic Range SFDR 78 dB VIN = 0.1V to 4.9V@1 kHz 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin P = Plastic DIP (300 mil Body), 8-lead SN = Plastic SOIC (150 mil Body), 8-lead 31

CAD (KiCad official)

  • Symbol: MCP3002-I
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: mcp3002-i-etched.step / mcp3002-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp3002-i.step / mcp3002-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (34 pp, sha256 f56619dae10231a0, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF