component
MCP2562FDT-H
Public Made by Adomby adom
Microchip Tech CAN ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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MCP2562FDT-H
Microchip Tech · CAN ICs · SOIC-8
MCP2562FDT-H from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | TXD | input | Transmitter data input: when TXD is Low, CANH and CANL are in the Dominant state, and when High they are Recessive unless another node drives Dominant; it has an internal pull-up of nominal 33 k to VIO on the MCP2562FD. |
| 2 | VSS | power_in | Ground supply pin; it is recommended to connect the exposed thermal pad to VSS on DFN variants. |
| 3 | VDD | power_in | Positive supply voltage pin that supplies the transmitter and receiver, including the wake-up receiver, with typical undervoltage threshold of 4V. |
| 4 | RXD | output | CMOS-compatible receive data output that is High when the CAN bus is Recessive and Low in the Dominant state, supplied by VIO on the MCP2562FD. |
| 5 | VIO | power_in | Supply for the digital I/O pins (TXD, RXD and STBY) on the MCP2562FD, with typical undervoltage threshold of 1.2V and RXD transferring data down to 1.8V on VIO. |
| 6 | CANL | bidirectional | CAN Low-level voltage I/O that drives the Low side of the CAN differential bus and disconnects from the bus when the device is not powered. |
| 7 | CANH | bidirectional | CAN High-level voltage I/O that drives the High side of the CAN differential bus and disconnects from the bus when the device is not powered. |
| 8 | STBY | input | Standby mode input that selects Standby mode when High and Normal mode when Low, with an internal MOS pull-up to VIO of typically 660 k at 5V, 1.1 M at 3.3V and 4.4 M at 1.8V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Communication Interface Chip/UART/485/232 |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VDD Pin Voltage Range | VDD | 4.5 | 5.5 | V | 9 | ||
| Digital Supply Voltage Range | VIO | 1.8 | 5.5 | V | 9 | ||
| Supply Current | IDD | 5 | 10 | mA | Recessive; VTXD = VDD | 9 | |
| Supply Current | IDD | 45 | 70 | mA | Dominant; VTXD = 0V | 9 | |
| Standby Current | IDDS | 5 | 15 | µA | MCP2562FD; Includes IIO | 9 | |
| High Level of the POR Comparator | VPORH | 3.8 | 4.3 | V | 9 | ||
| Low Level of the POR Comparator | VPORL | 3.4 | 4 | V | 9 | ||
| Hysteresis of POR Comparator | VPORD | 0.3 | 0.8 | V | 9 | ||
| Supply Current on VIO | IIO | 4 | 30 | µA | Recessive; VTXD = VIO | 9 | |
| Supply Current on VIO | IIO | 85 | 500 | µA | Dominant; VTXD = 0V | 9 | |
| Standby Current | IDDS | 0.3 | 1 | µA | Note 1 | 9 | |
| Recessive Bus Output Voltage | VO(R) | 2 | 3 | V | VTXD = VDD; No load | 9 | |
| Bus Output Voltage in Standby | VO(S) | -0.1 | 0 | 0.1 | V | STBY = VTXD = VDD; No load | 9 |
| Recessive Output Current | IO(R) | -5 | 5 | mA | -24V < VCAN < +24V | 9 | |
| CANH Dominant Output Voltage | VO(D) | 2.75 | 3.5 | 4.5 | V | TXD = 0; RL = 50 to 65 | 9 |
| CANL Dominant Output Voltage | VO(D) | 0.5 | 1.5 | 2.25 | V | RL = 50 to 65 | 9 |
| Symmetry of Dominant Output Voltage (VDD - VCANH - VCANL) | VO(D)(M) | -400 | 0 | 400 | mV | VTXD = VSS (Note 1) | 9 |
| Dominant Differential Output Voltage | VO(DIFF) | 1.5 | 2 | 3 | V | VTXD = VSS; RL = 50 to 65 | 9 |
| Recessive Differential Output Voltage | VO(DIFF) | -120 | 0 | 12 | mV | VTXD = VDD | 9 |
| Recessive Differential Output Voltage | VO(DIFF) | -500 | 0 | 50 | mV | VTXD = VDD, no load. | 9 |
| CANH Short Circuit Output Current | IO(SC) | -120 | 85 | mA | VTXD = VSS; VCANH = 0V; CANL: floating | 10 | |
| CANL Short Circuit Output Current | IO(SC) | 75 | 120 | mA | VTXD = VSS; VCANL = 18V; CANH: floating | 10 | |
| Recessive Differential Input Voltage | VDIFF(R)(I) | -1 | 0.5 | V | Normal Mode; -12V < V(CANH, CANL) < +12V; See Figure 2-6 (Note 3) | 10 | |
| Recessive Differential Input Voltage | VDIFF(R)(I) | -1 | 0.4 | V | Standby Mode; -12V < V(CANH, CANL) < +12V; See Figure 2-6 (Note 3) | 10 | |
| Dominant Differential Input Voltage | VDIFF(D)(I) | 0.9 | V | Normal Mode; -12V < V(CANH, CANL) < +12V; See Figure 2-6 (Note 3) | 10 | ||
| Dominant Differential Input Voltage | VDIFF(D)(I) | 1 | V | Standby Mode; -12V < V(CANH, CANL) < +12V; See Figure 2-6 (Note 3) | 10 | ||
| Differential Receiver Threshold | VTH(DIFF) | 0.5 | 0.7 | 0.9 | V | Normal Mode; -12V < V(CANH, CANL) < +12V; See Figure 2-6 (Note 3) | 10 |
| Differential Receiver Threshold | VTH(DIFF) | 0.4 | 1.15 | V | Standby Mode; -12V < V(CANH, CANL) < +12V; See Figure 2-6 (Note 3) | 10 | |
| Differential Input Hysteresis | VHYS(DIFF) | 50 | 200 | mV | Normal mode, see Figure 2-6, (Note 1) | 10 | |
| Common Mode Input Resistance | RIN | 10 | 30 | k | (Note 1) | 10 | |
| Differential Input Resistance | RIN(DIFF) | 10 | 100 | k | (Note 1) | 10 | |
| Common Mode Input Capacitance | CIN(CM) | 20 | pF | VTXD = VDD; (Note 1) | 10 | ||
| CANH, CANL Input Leakage | ILI | -5 | 5 | µA | VDD = VTXD = VSTBY = 0V. For MCP2562FD, VIO = 0V. VCANH = VCANL = 5 V. | 10 | |
| Digital Input Pins Low-Level Input Voltage | VIL | -0.3 | V | 11 | |||
| TXD: Low-Level Input Current | IIL(TXD) | -270 | -150 | -30 | µA | 11 | |
| STBY: Low-Level Input Current | IIL(STBY) | -30 | -1 | µA | 11 | ||
| Low-Level Output Voltage | VOL | 0.4 | V | IOL = 4 mA; typical 8 mA | 11 | ||
| Shutdown Junction Temperature | TJ(SD) | 165 | 175 | 185 | °C | -12V < V(CANH, CANL) < +12V, (Note 1) | 11 |
| Shutdown Temperature Hysteresis | TJ(HYST) | 20 | 30 | °C | -12V < V(CANH, CANL) < +12V, (Note 1) | 11 | |
| Bit Time | tBIT | 0.2 | 69.44 | µs | 13 | ||
| Bit Frequency | fBIT | 14.4 | 5000 | kHz | 13 | ||
| Recessive bit time on RXD - 2 Mbps, Loop Delay Symmetry | tBIT(RXD),2M | 450 | 485 | 550 | ns | tBIT(TXD) = 500 ns, see Figure 2-10 | 13 |
| Recessive bit time on RXD - 5 Mbps, Loop Delay Symmetry | tBIT(RXD),5M | 160 | 185 | 220 | ns | tBIT(TXD) = 200 ns, see Figure 2-10 | 13 |
| Delay Bus Dominant to RXD (Standby mode) | tFLTR(WAKE) | 0.5 | 1 | 4 | µs | Standby mode | 13 |
| Delay Standby to Normal Mode | tWAKE | 5 | 25 | 40 | µs | Negative edge on STBY | 13 |
| VDD Supply Voltage Absolute Maximum | VDD | 7 | V | 8 | |||
| VIO Supply Voltage Absolute Maximum | VIO | 7 | V | 8 | |||
| DC Voltage at CANH, CANL and SPLIT | -58 | 58 | V | 8 | |||
| Transient Voltage on CANH, CANL (ISO-7637) | -150 | 100 | V | See Figure 2-5 | 8 | ||
| Storage temperature | -55 | 150 | °C | 8 | |||
| Specified Temperature Range | TA | -40 | 150 | C | H grade | 16 | |
| Operating Temperature Range | TA | -40 | 150 | C | 16 | ||
| Storage Temperature Range | TA | -65 | 155 | C | 16 | ||
| Thermal Resistance, 8L-SOIC | JA | 149.5 | C/W | 16 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | P = Plastic Dual In-Line - 300 mil Body, 8-lead SN = Plastic Small Outline - Narrow, 3.90 mm Body, | 29 |
CAD (KiCad official)
- Symbol:
MCP2562FDT-H - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
mcp2562fdt-h-etched.step/mcp2562fdt-h-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp2562fdt-h.step/mcp2562fdt-h.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (32 pp, sha256
79321323eb3295c5, retrieved 2026-10-27, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).